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| author | Bjorn Helgaas <bhelgaas@google.com> | 2016-10-03 17:42:57 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-10-03 17:42:57 +0300 |
| commit | 4dc2db096a9f7c0316bafc18ee00d89e0acf4ebf (patch) | |
| tree | 99563a111f0f5c0b2d8e90acfe840c7db1d0c603 /include/linux/pci.h | |
| parent | 9e18ad98ca71ca0cfcadf633547409829773f36a (diff) | |
| parent | 6b20f728549030056402d7f68ea670eea1eb8198 (diff) | |
| download | linux-4dc2db096a9f7c0316bafc18ee00d89e0acf4ebf.tar.xz | |
Merge branch 'pci/aer' into next
* pci/aer:
PCI/AER: Fix aer_probe() kernel-doc comment
PCI/AER: Cache capability position
PCI/AER: Avoid memory allocation in interrupt handling path
ACPI / APEI: Send correct severity to calculate AER severity
PCI/AER: Remove duplicate AER severity translation
PCI/AER: Remove aerdriver.forceload kernel parameter
PCI/AER: Remove aerdriver.nosourceid kernel parameter
x86/PCI: VMD: Add quirk for AER to ignore source ID
PCI/AER: Add bus flag to skip source ID matching
Conflicts:
drivers/pci/probe.c
Diffstat (limited to 'include/linux/pci.h')
| -rw-r--r-- | include/linux/pci.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 7256f33b6a15..84d222ad3c08 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -187,8 +187,9 @@ enum pci_irq_reroute_variant { typedef unsigned short __bitwise pci_bus_flags_t; enum pci_bus_flags { - PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, - PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, + PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, + PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, + PCI_BUS_FLAGS_NO_AERSID = (__force pci_bus_flags_t) 4, }; /* These values come from the PCI Express Spec */ @@ -268,6 +269,9 @@ struct pci_dev { unsigned int class; /* 3 bytes: (base,sub,prog-if) */ u8 revision; /* PCI revision, low byte of class word */ u8 hdr_type; /* PCI header type (`multi' flag masked out) */ +#ifdef CONFIG_PCIEAER + u16 aer_cap; /* AER capability offset */ +#endif u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ u8 msix_cap; /* MSI-X capability offset */ @@ -1374,9 +1378,11 @@ static inline bool pcie_aspm_support_enabled(void) { return false; } #ifdef CONFIG_PCIEAER void pci_no_aer(void); bool pci_aer_available(void); +int pci_aer_init(struct pci_dev *dev); #else static inline void pci_no_aer(void) { } static inline bool pci_aer_available(void) { return false; } +static inline int pci_aer_init(struct pci_dev *d) { return -ENODEV; } #endif #ifdef CONFIG_PCIE_ECRC |