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author | Miquel Raynal <miquel.raynal@bootlin.com> | 2021-05-06 00:37:44 +0300 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2021-05-26 11:51:00 +0300 |
commit | f3fe156ede6db96a060cc98ff1bce1ee6417a68b (patch) | |
tree | 8d2602c4f084100851b09c740b34c7b6c835a877 /include/linux/mtd | |
parent | e32df79f19c756f072bd517ece65df1efd496f95 (diff) | |
download | linux-f3fe156ede6db96a060cc98ff1bce1ee6417a68b.tar.xz |
mtd: rawnand: Support enabling NV-DDR through SET_FEATURES
Until now the parameter of the ADDR_TIMING_MODE feature was just the
ONFI timing mode (from 0 to 5) because we were only supporting the SDR
data interface. In the same byte, bits 4 and 5 indicate which data
interface is being configured so use them to set the right mode and also
read them back to ensure the right timing has been setup on the chip's
side.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-17-miquel.raynal@bootlin.com
Diffstat (limited to 'include/linux/mtd')
-rw-r--r-- | include/linux/mtd/onfi.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/mtd/onfi.h b/include/linux/mtd/onfi.h index a9677bf1e47e..a7376f9beddf 100644 --- a/include/linux/mtd/onfi.h +++ b/include/linux/mtd/onfi.h @@ -11,6 +11,7 @@ #define __LINUX_MTD_ONFI_H #include <linux/types.h> +#include <linux/bitfield.h> /* ONFI version bits */ #define ONFI_VERSION_1_0 BIT(1) @@ -29,6 +30,9 @@ #define ONFI_FEATURE_EXT_PARAM_PAGE BIT(7) /* ONFI timing mode, used in both asynchronous and synchronous mode */ +#define ONFI_DATA_INTERFACE_SDR 0 +#define ONFI_DATA_INTERFACE_NVDDR BIT(4) +#define ONFI_DATA_INTERFACE_NVDDR2 BIT(5) #define ONFI_TIMING_MODE_0 BIT(0) #define ONFI_TIMING_MODE_1 BIT(1) #define ONFI_TIMING_MODE_2 BIT(2) @@ -36,6 +40,7 @@ #define ONFI_TIMING_MODE_4 BIT(4) #define ONFI_TIMING_MODE_5 BIT(5) #define ONFI_TIMING_MODE_UNKNOWN BIT(6) +#define ONFI_TIMING_MODE_PARAM(x) FIELD_GET(GENMASK(3, 0), (x)) /* ONFI feature number/address */ #define ONFI_FEATURE_NUMBER 256 |