summaryrefslogtreecommitdiff
path: root/include/linux/mtd
diff options
context:
space:
mode:
authorJungseung Lee <js07.lee@samsung.com>2020-01-13 08:59:05 +0300
committerTudor Ambarus <tudor.ambarus@microchip.com>2020-02-17 03:07:24 +0300
commit8c79fa6c44deac8042bd747527fea06a32738158 (patch)
tree6dbafa09e785efa3f9d4087e3013148c70832873 /include/linux/mtd
parent5b24efe7d55a4bea6992ae1ee00707d77ec22575 (diff)
downloadlinux-8c79fa6c44deac8042bd747527fea06a32738158.tar.xz
mtd: spi-nor: introduce SR_BP_SHIFT define
The shift variable of SR_BP is conclusive because the first bit of SR_BP is fixed on all known flashes. Replace ffs operation with SR_BP_SHIFT. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/spi-nor.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 5abd91cc6dfa..61be6ed33097 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -137,6 +137,8 @@
#define SR1_QUAD_EN_BIT6 BIT(6)
+#define SR_BP_SHIFT 2
+
/* Enhanced Volatile Configuration Register bits */
#define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */