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author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-11-07 11:42:09 +0300 |
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committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-11-11 09:56:40 +0300 |
commit | 658488ed2108f5772572c5a17c3f31ed6e554edc (patch) | |
tree | b4dc23d4a48d12138467b0610a55739d5033a865 /include/linux/mtd/spi-nor.h | |
parent | 7b678c69c0ca59ed4a1e65055b1e58918db38968 (diff) | |
download | linux-658488ed2108f5772572c5a17c3f31ed6e554edc.tar.xz |
mtd: spi-nor: Rename Quad Enable methods
Rename macronix_quad_enable() to a generic name:
spi_nor_sr1_bit6_quad_enable().
Prepend "spi_nor_" to "sr2_bit7_quad_enable". All SPI NOR generic
methods should be prepended by "spi_nor_".
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'include/linux/mtd/spi-nor.h')
-rw-r--r-- | include/linux/mtd/spi-nor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 364309845de0..9eae35c60bce 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -133,7 +133,7 @@ #define SR_E_ERR BIT(5) #define SR_P_ERR BIT(6) -#define SR_QUAD_EN_MX BIT(6) /* Macronix Quad I/O */ +#define SR1_QUAD_EN_BIT6 BIT(6) /* Enhanced Volatile Configuration Register bits */ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ |