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authorAdrian Hunter <adrian.hunter@intel.com>2020-08-18 13:45:08 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2020-09-07 10:11:29 +0300
commit46f4a69ec8ed6ab9f6a6172afe50df792c8bc1b6 (patch)
treeee57c4096560ccc2909654b55389ef55d7e2047d /include/linux/mmc
parentc92a6af6860c37dfa411049fdac45d225f0b424c (diff)
downloadlinux-46f4a69ec8ed6ab9f6a6172afe50df792c8bc1b6.tar.xz
mmc: sdhci: Add LTR support for some Intel BYT based controllers
Some Intel BYT based host controllers support the setting of latency tolerance. Accordingly, implement the PM QoS ->set_latency_tolerance() callback. The raw register values are also exposed via debugfs. Intel EHL controllers require this support. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: cb3a7d4a0aec4e ("mmc: sdhci-pci: Add support for Intel EHL") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200818104508.7149-1-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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