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authorSaeed Mahameed <saeedm@mellanox.com>2019-05-03 23:14:59 +0300
committerSaeed Mahameed <saeedm@mellanox.com>2019-07-11 21:45:03 +0300
commitdb849faa9bef993a1379dc510623f750a72fa7ce (patch)
tree48e01e977087417fb5857fe10dc436ea1013c441 /include/linux/mlx5
parent914adbb1bcf89478ac138318d28b302704564d59 (diff)
downloadlinux-db849faa9bef993a1379dc510623f750a72fa7ce.tar.xz
net/mlx5e: Rx, Fix checksum calculation for new hardware
CQE checksum full mode in new HW, provides a full checksum of rx frame. Covering bytes starting from eth protocol up to last byte in the received frame (frame_size - ETH_HLEN), as expected by the stack. Fixing up skb->csum by the driver is not required in such case. This fix is to avoid wrong checksum calculation in drivers which already support the new hardware with the new checksum mode. Fixes: 85327a9c4150 ("net/mlx5: Update the list of the PCI supported devices") Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/mlx5_ifc.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 5e74305e2e57..7e42efa143a0 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -749,7 +749,8 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
u8 swp[0x1];
u8 swp_csum[0x1];
u8 swp_lso[0x1];
- u8 reserved_at_23[0xd];
+ u8 cqe_checksum_full[0x1];
+ u8 reserved_at_24[0xc];
u8 max_vxlan_udp_ports[0x8];
u8 reserved_at_38[0x6];
u8 max_geneve_opt_len[0x1];