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authorHuy Nguyen <huyn@mellanox.com>2020-06-06 04:17:51 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2020-10-13 01:37:45 +0300
commit9b9d454ddbf0c41391ed68ea82bc3d8ff6a65074 (patch)
treedee9b4b77ee6bb17a2edf59e7d8a52921d4fe222 /include/linux/mlx5
parentee92e4f1f95eb7b8820299f10fc5fba16d85cece (diff)
downloadlinux-9b9d454ddbf0c41391ed68ea82bc3d8ff6a65074.tar.xz
net/mlx5e: IPsec: Add TX steering rule per IPsec state
Add new FTE in TX IPsec FT per IPsec state. It has the same matching criteria as the RX steering rule. The IPsec FT is created/destroyed when the first/last rule is added/deleted respectively. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Reviewed-by: Boris Pismenny <borisp@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/qp.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index 36492a1342cf..d75ef8aa8fac 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -245,6 +245,10 @@ enum {
MLX5_ETH_WQE_SWP_OUTER_L4_UDP = 1 << 5,
};
+enum {
+ MLX5_ETH_WQE_FT_META_IPSEC = BIT(0),
+};
+
struct mlx5_wqe_eth_seg {
u8 swp_outer_l4_offset;
u8 swp_outer_l3_offset;
@@ -253,7 +257,7 @@ struct mlx5_wqe_eth_seg {
u8 cs_flags;
u8 swp_flags;
__be16 mss;
- __be32 rsvd2;
+ __be32 flow_table_metadata;
union {
struct {
__be16 sz;