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authorXu Yilun <yilun.xu@intel.com>2021-03-10 18:55:45 +0300
committerLee Jones <lee.jones@linaro.org>2021-04-14 18:03:37 +0300
commitd9b326b2c3673f939941806146aee38e5c635fd0 (patch)
tree0f90adbf4527e71ddf5e2e85b01b38e4429c72a3 /include/linux/mfd/intel-m10-bmc.h
parent23144a323118380a97e39b3b3f09ae3099c5aeb4 (diff)
downloadlinux-d9b326b2c3673f939941806146aee38e5c635fd0.tar.xz
mfd: intel-m10-bmc: Fix the register access range
This patch fixes the max register address of MAX 10 BMC. The range 0x20000000 ~ 0x200000fc are for control registers of the QSPI flash controller, which are not accessible to host. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd/intel-m10-bmc.h')
-rw-r--r--include/linux/mfd/intel-m10-bmc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index 74d4e193966a..9b54ca13eac3 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -11,7 +11,7 @@
#define M10BMC_LEGACY_SYS_BASE 0x300400
#define M10BMC_SYS_BASE 0x300800
-#define M10BMC_MEM_END 0x200000fc
+#define M10BMC_MEM_END 0x1fffffff
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0