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| author | Marc Zyngier <marc.zyngier@arm.com> | 2017-01-03 16:39:52 +0300 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-08-31 17:31:36 +0300 |
| commit | 3ca63f363f3f8fe457482c53d5c86d83bff21e64 (patch) | |
| tree | 11268a0c171495eb884359b86e95b532123a575d /include/linux/irqchip/arm-gic-v3.h | |
| parent | eb78192be2833484b0f7b506d217a40621215251 (diff) | |
| download | linux-3ca63f363f3f8fe457482c53d5c86d83bff21e64.tar.xz | |
irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors
V{PEND,PROP}BASER being 64bit registers, they need some ad-hoc
accessors on 32bit, specially given that VPENDBASER contains
a Valid bit, making the access a bit convoluted.
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'include/linux/irqchip/arm-gic-v3.h')
| -rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 7c6fd8f3e36c..17ba0d732f12 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -212,6 +212,11 @@ #define LPI_PROP_GROUP1 (1 << 1) #define LPI_PROP_ENABLED (1 << 0) +#define GICR_VPENDBASER_Dirty (1ULL << 60) +#define GICR_VPENDBASER_PendingLast (1ULL << 61) +#define GICR_VPENDBASER_IDAI (1ULL << 62) +#define GICR_VPENDBASER_Valid (1ULL << 63) + /* * ITS registers, offsets from ITS_base */ |