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authorLinus Walleij <linus.walleij@linaro.org>2016-09-23 15:51:18 +0300
committerLinus Walleij <linus.walleij@linaro.org>2016-09-23 15:51:18 +0300
commit22a5db98a30ea734c29056b0d59cb4fe2a383bc2 (patch)
treed1d5b3ee914e95f00b917ebf48b59fe8331a5734 /include/linux/gpio
parent9132ce450bd141cd8c5776b41e90f146cae4bc3b (diff)
parent79b804cb6af4f128b2c53f0887c02537a7eb5824 (diff)
downloadlinux-22a5db98a30ea734c29056b0d59cb4fe2a383bc2.tar.xz
Merge branch 'gpio-irq-validmask' of /home/linus/linux-pinctrl into devel
Diffstat (limited to 'include/linux/gpio')
-rw-r--r--include/linux/gpio/driver.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 216e6f275aa8..1f0be7213e6d 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -112,6 +112,10 @@ enum single_ended_mode {
* initialization, provided by GPIO driver
* @irq_parent: GPIO IRQ chip parent/bank linux irq number,
* provided by GPIO driver
+ * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all
+ * bits set to one
+ * @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to
+ * be included in IRQ domain of the chip
* @lock_key: per GPIO IRQ chip lockdep class
*
* A gpio_chip can help platforms abstract various sources of GPIOs so
@@ -190,6 +194,8 @@ struct gpio_chip {
irq_flow_handler_t irq_handler;
unsigned int irq_default_type;
int irq_parent;
+ bool irq_need_valid_mask;
+ unsigned long *irq_valid_mask;
struct lock_class_key *lock_key;
#endif