diff options
author | Kurt Kanzenbach <kurt@linutronix.de> | 2018-08-13 10:18:46 +0300 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2018-09-05 00:37:38 +0300 |
commit | ff8648f29fe58c2d94d32a076d2de7b92be4b485 (patch) | |
tree | eec8dd643dd7b57abecf3c768c02bb3529d5e855 /include/linux/fsl_ifc.h | |
parent | 434655af6a187129d8114640443b27d2cecfb979 (diff) | |
download | linux-ff8648f29fe58c2d94d32a076d2de7b92be4b485.tar.xz |
mtd: rawnand: fsl_ifc: fixup SRAM init for newer ctrl versions
Newer versions of the IFC controller use a different method of initializing the
internal SRAM: Instead of reading from flash, a bit in the NAND configuration
register has to be set in order to trigger the self-initializing process.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'include/linux/fsl_ifc.h')
-rw-r--r-- | include/linux/fsl_ifc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h index 3fdfede2f0f3..5f343b796ad9 100644 --- a/include/linux/fsl_ifc.h +++ b/include/linux/fsl_ifc.h @@ -274,6 +274,8 @@ */ /* Auto Boot Mode */ #define IFC_NAND_NCFGR_BOOT 0x80000000 +/* SRAM Initialization */ +#define IFC_NAND_NCFGR_SRAM_INIT_EN 0x20000000 /* Addressing Mode-ROW0+n/COL0 */ #define IFC_NAND_NCFGR_ADDR_MODE_RC0 0x00000000 /* Addressing Mode-ROW0+n/COL0+n */ |