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authorHoratiu Vultur <horatiu.vultur@microchip.com>2021-02-17 00:42:03 +0300
committerDavid S. Miller <davem@davemloft.net>2021-02-17 01:47:46 +0300
commitd8ea7ff3995ead5193313c72c0d97c9c16c83be9 (patch)
tree03c190f5a83224b975528384e8b2219fa52e6f3b /include/linux/dsa
parentcd605d455a445837edb3372addbdd9a9e38df23b (diff)
downloadlinux-d8ea7ff3995ead5193313c72c0d97c9c16c83be9.tar.xz
net: mscc: ocelot: Add support for MRP
Add basic support for MRP. The HW will just trap all MRP frames on the ring ports to CPU and allow the SW to process them. In this way it is possible to for this node to behave both as MRM and MRC. Current limitations are: - it doesn't support Interconnect roles. - it supports only a single ring. - the HW should be able to do forwarding of MRP Test frames so the SW will not need to do this. So it would be able to have the role MRC without SW support. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/dsa')
-rw-r--r--include/linux/dsa/ocelot.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/dsa/ocelot.h b/include/linux/dsa/ocelot.h
index c6bc45ae5e03..4265f328681a 100644
--- a/include/linux/dsa/ocelot.h
+++ b/include/linux/dsa/ocelot.h
@@ -160,6 +160,11 @@ static inline void ocelot_xfh_get_src_port(void *extraction, u64 *src_port)
packing(extraction, src_port, 46, 43, OCELOT_TAG_LEN, UNPACK, 0);
}
+static inline void ocelot_xfh_get_cpuq(void *extraction, u64 *cpuq)
+{
+ packing(extraction, cpuq, 28, 20, OCELOT_TAG_LEN, UNPACK, 0);
+}
+
static inline void ocelot_xfh_get_qos_class(void *extraction, u64 *qos_class)
{
packing(extraction, qos_class, 19, 17, OCELOT_TAG_LEN, UNPACK, 0);