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author | Stephen Boyd <sboyd@kernel.org> | 2022-08-02 22:19:18 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2022-08-02 22:19:18 +0300 |
commit | f04ed3d9f8a5449736081c2c9906569aa8399c9b (patch) | |
tree | a73495190d7e916cf0a3a2d87319fcbe4eda58dd /include/linux/clk-provider.h | |
parent | 3d7cb6b04c3f3115719235cc6866b10326de34cd (diff) | |
parent | 6ebd5247ad2aa210b3ff4481c6ed8aa32a032b12 (diff) | |
parent | 3b3ec201f381d6cbd6caaa8bf6c37b74f2288bbc (diff) | |
parent | 62c0aff64c8d6594357b6217db019552ea664b90 (diff) | |
parent | 255584b138343d4a28c6d25bd82d04b09460d672 (diff) | |
download | linux-f04ed3d9f8a5449736081c2c9906569aa8399c9b.tar.xz |
Merge branches 'clk-basic', 'clk-mtk', 'clk-devm-enable' and 'clk-ti-dt' into clk-next
- Remove allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add reset support to more MediaTek clk drivers
- devm helpers for clk_get() + clk_prepare() and clk_enable()
* clk-basic:
clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
dt-bindings: clock: fixed-factor: Drop Allwinner A10 compatible
clk: fixed: Remove Allwinner A10 special-case logic
* clk-mtk:
clk: mediatek: reset: Add infra_ao reset support for MT8186
dt-bindings: arm: mediatek: Add #reset-cells property for MT8186
dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195
dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195
dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195
clk: mediatek: reset: Add reset support for simple probe
clk: mediatek: reset: Add new register reset function with device
clk: mediatek: reset: Change return type for clock reset register function
clk: mediatek: reset: Support inuput argument index mode
clk: mediatek: reset: Support nonsequence base offsets of reset registers
clk: mediatek: reset: Revise structure to control reset register
clk: mediatek: reset: Merge and revise reset register function
clk: mediatek: reset: Extract common drivers to update function
clk: mediatek: reset: Refine and reorder functions in reset.c
clk: mediatek: reset: Fix written reset bit offset
clk: mediatek: reset: Add reset.h
clk: mediatek: Delete MT8192 msdc gate
dt-bindings: ARM: Mediatek: Remove msdc binding of MT8192 clock
* clk-devm-enable:
clk: Remove never used devm_clk_*unregister()
clk: Fix pointer casting to prevent oops in devm_clk_release()
clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled()
clk: Provide new devm_clk helpers for prepared and enabled clocks
clk: generalize devm_clk_get() a bit
clk: Improve documentation for devm_clk_get() and its optional variant
* clk-ti-dt:
clk: ti: Stop using legacy clkctrl names for omap4 and 5