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authorShenming Lu <lushenming@huawei.com>2020-11-28 17:18:57 +0300
committerMarc Zyngier <maz@kernel.org>2020-11-30 14:18:29 +0300
commit57e3cebd022fbc035dcf190ac789fd2ffc747f5b (patch)
treea566c7a05f60d395cc47e072fdd8e1d600bb535e /include/kvm/arm_vgic.h
parentbf118a5cb7e6d17e7ec9492e4dc676e7e7b69d01 (diff)
downloadlinux-57e3cebd022fbc035dcf190ac789fd2ffc747f5b.tar.xz
KVM: arm64: Delay the polling of the GICR_VPENDBASER.Dirty bit
In order to reduce the impact of the VPT parsing happening on the GIC, we can split the vcpu reseidency in two phases: - programming GICR_VPENDBASER: this still happens in vcpu_load() - checking for the VPT parsing to be complete: this can happen on vcpu entry (in kvm_vgic_flush_hwstate()) This allows the GIC and the CPU to work in parallel, rewmoving some of the entry overhead. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Shenming Lu <lushenming@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20201128141857.983-3-lushenming@huawei.com
Diffstat (limited to 'include/kvm/arm_vgic.h')
-rw-r--r--include/kvm/arm_vgic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index a8d8fdcd3723..3d74f1060bd1 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -402,6 +402,7 @@ int kvm_vgic_v4_unset_forwarding(struct kvm *kvm, int irq,
struct kvm_kernel_irq_routing_entry *irq_entry);
int vgic_v4_load(struct kvm_vcpu *vcpu);
+void vgic_v4_commit(struct kvm_vcpu *vcpu);
int vgic_v4_put(struct kvm_vcpu *vcpu, bool need_db);
#endif /* __KVM_ARM_VGIC_H */