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authorArnd Bergmann <arnd@arndb.de>2020-12-09 01:56:06 +0300
committerArnd Bergmann <arnd@arndb.de>2020-12-09 01:56:07 +0300
commit1e3e7ca547a6ee2c5c232535cb546919ce0fbea7 (patch)
tree762614b650e2795478f1860c25900c960267c6b5 /include/dt-bindings
parent96631a0d116528a1ab4b399bcd8b6b491394905c (diff)
parentb6a1c8a1eaa73b1e2ae251399308e9445d74cef7 (diff)
downloadlinux-1e3e7ca547a6ee2c5c232535cb546919ce0fbea7.tar.xz
Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic updates for v5.11 - AXG SoCs: add/enable PCIe & USB OTG support - AXG SoCs: add MIPI DSI support - Khadas VIM: add RTC - several cleanups & fixups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-sm1: fix typo in opp table arm64: dts: meson: add KHAMSIN IR remote node to SML5442TW arm64: dts: meson: update the Khadas VIM3/3L LED bindings arm64: dts: meson: fix spi-max-frequency on Khadas VIM2 arm64: dts: meson: add rtc aliases to meson-khadas-vim3.dtsi arm64: dts: meson: Add capacity-dmips-mhz attributes to GXM arm64: dts: meson-axg-s400: enable PCIe M.2 Key E slots arm64: dts: meson-axg: add PCIe nodes arm64: dts: meson-axg: add MIPI DSI PHY nodes arm64: dts: meson-axg: add PWRC node arm64: dts: meson: enable rtc node on Khadas VIM1/VIM2 boards dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding dt-bindings: clk: axg-clkc: add Video Clocks arm64: dts: meson: add watchdog to g12-common dtsi arm64: dts: meson: remove empty lines from aml-s905x-cc v2 dts Link: https://lore.kernel.org/r/7heek9jgox.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/axg-clkc.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/axg-clkc.h b/include/dt-bindings/clock/axg-clkc.h
index fd1f938c38d1..e2749dbc74b8 100644
--- a/include/dt-bindings/clock/axg-clkc.h
+++ b/include/dt-bindings/clock/axg-clkc.h
@@ -72,5 +72,30 @@
#define CLKID_PCIE_CML_EN1 80
#define CLKID_MIPI_ENABLE 81
#define CLKID_GEN_CLK 84
+#define CLKID_VPU_0_SEL 92
+#define CLKID_VPU_0 93
+#define CLKID_VPU_1_SEL 95
+#define CLKID_VPU_1 96
+#define CLKID_VPU 97
+#define CLKID_VAPB_0_SEL 99
+#define CLKID_VAPB_0 100
+#define CLKID_VAPB_1_SEL 102
+#define CLKID_VAPB_1 103
+#define CLKID_VAPB_SEL 104
+#define CLKID_VAPB 105
+#define CLKID_VCLK 106
+#define CLKID_VCLK2 107
+#define CLKID_VCLK_DIV1 122
+#define CLKID_VCLK_DIV2 123
+#define CLKID_VCLK_DIV4 124
+#define CLKID_VCLK_DIV6 125
+#define CLKID_VCLK_DIV12 126
+#define CLKID_VCLK2_DIV1 127
+#define CLKID_VCLK2_DIV2 128
+#define CLKID_VCLK2_DIV4 129
+#define CLKID_VCLK2_DIV6 130
+#define CLKID_VCLK2_DIV12 131
+#define CLKID_CTS_ENCL 133
+#define CLKID_VDIN_MEAS 136
#endif /* __AXG_CLKC_H */