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authorChen Wang <unicorn_wang@outlook.com>2024-01-15 12:58:46 +0300
committerChen Wang <unicorn_wang@outlook.com>2024-06-14 09:49:40 +0300
commit88a26c3c2405626e0083a49609c5e8cd6c453d87 (patch)
tree7588d0350ef6552da9ee6b67a7a0b7dddeab3cb0 /include/dt-bindings/clock
parent1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff)
downloadlinux-88a26c3c2405626e0083a49609c5e8cd6c453d87.tar.xz
dt-bindings: clock: sophgo: add pll clocks for SG2042
Add bindings for the pll clocks for Sophgo SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guo Ren <guoren@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/sophgo,sg2042-pll.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sophgo,sg2042-pll.h b/include/dt-bindings/clock/sophgo,sg2042-pll.h
new file mode 100644
index 000000000000..2d519b3bf51c
--- /dev/null
+++ b/include/dt-bindings/clock/sophgo,sg2042-pll.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_SOPHGO_SG2042_PLL_H__
+#define __DT_BINDINGS_SOPHGO_SG2042_PLL_H__
+
+#define MPLL_CLK 0
+#define FPLL_CLK 1
+#define DPLL0_CLK 2
+#define DPLL1_CLK 3
+
+#endif /* __DT_BINDINGS_SOPHGO_SG2042_PLL_H__ */