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| author | Joe Perches <joe@perches.com> | 2008-03-23 11:01:45 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-04-17 19:41:22 +0400 |
| commit | 286275c90f148562b973b1e1f39f9689e6676dc4 (patch) | |
| tree | 5d9800fba92a22095dfaebbb794346546e39ebaa /include/asm-x86/bitops.h | |
| parent | 49f74946f008add0b22723244976a32b365de06f (diff) | |
| download | linux-286275c90f148562b973b1e1f39f9689e6676dc4.tar.xz | |
include/asm-x86/bitops.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/bitops.h')
| -rw-r--r-- | include/asm-x86/bitops.h | 37 |
1 files changed, 13 insertions, 24 deletions
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h index 7a76555b676a..1ae7b270a1ef 100644 --- a/include/asm-x86/bitops.h +++ b/include/asm-x86/bitops.h @@ -23,13 +23,13 @@ #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) /* Technically wrong, but this avoids compilation errors on some gcc versions. */ -#define ADDR "=m" (*(volatile long *) addr) -#define BIT_ADDR "=m" (((volatile int *) addr)[nr >> 5]) +#define ADDR "=m" (*(volatile long *)addr) +#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5]) #else #define ADDR "+m" (*(volatile long *) addr) -#define BIT_ADDR "+m" (((volatile int *) addr)[nr >> 5]) +#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5]) #endif -#define BASE_ADDR "m" (*(volatile int *) addr) +#define BASE_ADDR "m" (*(volatile int *)addr) /** * set_bit - Atomically set a bit in memory @@ -48,9 +48,7 @@ */ static inline void set_bit(int nr, volatile void *addr) { - asm volatile(LOCK_PREFIX "bts %1,%0" - : ADDR - : "Ir" (nr) : "memory"); + asm volatile(LOCK_PREFIX "bts %1,%0" : ADDR : "Ir" (nr) : "memory"); } /** @@ -82,8 +80,7 @@ static inline void __set_bit(int nr, volatile void *addr) */ static inline void clear_bit(int nr, volatile void *addr) { - asm volatile(LOCK_PREFIX "btr %1,%2" - : BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); } /* @@ -151,8 +148,7 @@ static inline void __change_bit(int nr, volatile void *addr) */ static inline void change_bit(int nr, volatile void *addr) { - asm volatile(LOCK_PREFIX "btc %1,%2" - : BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); } /** @@ -168,9 +164,7 @@ static inline int test_and_set_bit(int nr, volatile void *addr) int oldbit; asm volatile(LOCK_PREFIX "bts %2,%1\n\t" - "sbb %0,%0" - : "=r" (oldbit), ADDR - : "Ir" (nr) : "memory"); + "sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory"); return oldbit; } @@ -202,8 +196,7 @@ static inline int __test_and_set_bit(int nr, volatile void *addr) asm volatile("bts %2,%3\n\t" "sbb %0,%0" - : "=r" (oldbit), BIT_ADDR - : "Ir" (nr), BASE_ADDR); + : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); return oldbit; } @@ -221,8 +214,7 @@ static inline int test_and_clear_bit(int nr, volatile void *addr) asm volatile(LOCK_PREFIX "btr %2,%1\n\t" "sbb %0,%0" - : "=r" (oldbit), ADDR - : "Ir" (nr) : "memory"); + : "=r" (oldbit), ADDR : "Ir" (nr) : "memory"); return oldbit; } @@ -242,8 +234,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr) asm volatile("btr %2,%3\n\t" "sbb %0,%0" - : "=r" (oldbit), BIT_ADDR - : "Ir" (nr), BASE_ADDR); + : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); return oldbit; } @@ -254,8 +245,7 @@ static inline int __test_and_change_bit(int nr, volatile void *addr) asm volatile("btc %2,%3\n\t" "sbb %0,%0" - : "=r" (oldbit), BIT_ADDR - : "Ir" (nr), BASE_ADDR); + : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); return oldbit; } @@ -274,8 +264,7 @@ static inline int test_and_change_bit(int nr, volatile void *addr) asm volatile(LOCK_PREFIX "btc %2,%1\n\t" "sbb %0,%0" - : "=r" (oldbit), ADDR - : "Ir" (nr) : "memory"); + : "=r" (oldbit), ADDR : "Ir" (nr) : "memory"); return oldbit; } |