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author | David S. Miller <davem@davemloft.net> | 2006-03-22 11:49:59 +0300 |
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committer | David S. Miller <davem@sunset.davemloft.net> | 2006-03-22 12:15:14 +0300 |
commit | dcc1e8dd88d4bc55e32a26dad7633d20ffe606d2 (patch) | |
tree | a47592213d94f918867d3dd81bb91dac3e727dea /include/asm-sparc64/cpudata.h | |
parent | 14778d9072e53d2171f66ffd9657daff41acfaed (diff) | |
download | linux-dcc1e8dd88d4bc55e32a26dad7633d20ffe606d2.tar.xz |
[SPARC64]: Add a secondary TSB for hugepage mappings.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/cpudata.h')
-rw-r--r-- | include/asm-sparc64/cpudata.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index c66a81bbc84d..9d6a6dbaf126 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h @@ -71,7 +71,8 @@ struct trap_per_cpu { /* Dcache line 7: Physical addresses of CPU send mondo block and CPU list. */ unsigned long cpu_mondo_block_pa; unsigned long cpu_list_pa; - unsigned long __pad1[2]; + unsigned long tsb_huge; + unsigned long tsb_huge_temp; /* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size. */ unsigned long __pad2[4]; @@ -116,6 +117,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, #define TRAP_PER_CPU_FAULT_INFO 0x40 #define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0 #define TRAP_PER_CPU_CPU_LIST_PA 0xc8 +#define TRAP_PER_CPU_TSB_HUGE 0xd0 +#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 #define TRAP_BLOCK_SZ_SHIFT 8 |