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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-17 02:20:36 +0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-17 02:20:36 +0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh/ec3104/ec3104.h
downloadlinux-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.xz
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-sh/ec3104/ec3104.h')
-rw-r--r--include/asm-sh/ec3104/ec3104.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/include/asm-sh/ec3104/ec3104.h b/include/asm-sh/ec3104/ec3104.h
new file mode 100644
index 000000000000..639cfa489c8f
--- /dev/null
+++ b/include/asm-sh/ec3104/ec3104.h
@@ -0,0 +1,43 @@
+#ifndef __ASM_EC3104_H
+#define __ASM_EC3104_H
+
+
+/*
+ * Most of the register set is at 0xb0ec0000 - 0xb0ecffff.
+ *
+ * as far as I've figured it out the register map is:
+ * 0xb0ec0000 - id string
+ * 0xb0ec0XXX - power management
+ * 0xb0ec1XXX - interrupt control
+ * 0xb0ec3XXX - ps2 port (touch pad on aero 8000)
+ * 0xb0ec6XXX - i2c
+ * 0xb0ec7000 - first serial port (proprietary connector on aero 8000)
+ * 0xb0ec8000 - second serial port
+ * 0xb0ec9000 - third serial port
+ * 0xb0eca000 - fourth serial port (keyboard controller on aero 8000)
+ * 0xb0eccXXX - GPIO
+ * 0xb0ecdXXX - GPIO
+ */
+
+#define EC3104_BASE 0xb0ec0000
+
+#define EC3104_SER4_DATA (EC3104_BASE+0xa000)
+#define EC3104_SER4_IIR (EC3104_BASE+0xa008)
+#define EC3104_SER4_MCR (EC3104_BASE+0xa010)
+#define EC3104_SER4_LSR (EC3104_BASE+0xa014)
+#define EC3104_SER4_MSR (EC3104_BASE+0xa018)
+
+/*
+ * our ISA bus. this seems to be real ISA.
+ */
+#define EC3104_ISA_BASE 0xa5000000
+
+#define EC3104_IRQ 11
+#define EC3104_IRQBASE 64
+
+#define EC3104_IRQ_SER1 EC3104_IRQBASE + 7
+#define EC3104_IRQ_SER2 EC3104_IRQBASE + 8
+#define EC3104_IRQ_SER3 EC3104_IRQBASE + 9
+#define EC3104_IRQ_SER4 EC3104_IRQBASE + 10
+
+#endif /* __ASM_EC3104_H */