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authorMaciej W. Rozycki <macro@linux-mips.org>2008-06-09 20:19:53 +0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-15 21:44:29 +0400
commitc88a8b4ab0e1a1f06938939d9ba42e9da6144ccb (patch)
tree6aee2390a9a5506176acb567021c8503200e1971 /include/asm-mips/io.h
parentcb11dfa0247df479e384c4a7ab6846f3a6bf1570 (diff)
downloadlinux-c88a8b4ab0e1a1f06938939d9ba42e9da6144ccb.tar.xz
[MIPS] Remove obsolete isa_slot_offset
The isa_slot_offset variable and its __ISA_IO_base macro is not used anywhere anymore. It does not look like a decent interface per today's standards either. Remove both including all places of initialization. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/io.h')
-rw-r--r--include/asm-mips/io.h17
1 files changed, 0 insertions, 17 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index f18d2816cbec..501a40b9f18d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -161,13 +161,6 @@ static inline void * isa_bus_to_virt(unsigned long address)
#define bus_to_virt phys_to_virt
/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor. This implies the assumption that there is only
- * one of these busses.
- */
-extern unsigned long isa_slot_offset;
-
-/*
* Change "struct page" to physical address.
*/
#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
@@ -528,16 +521,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
}
/*
- * ISA space is 'always mapped' on currently supported MIPS systems, no need
- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
- * are physical addresses. The following constant pointer can be
- * used as the IO-area pointer (it can be iounmapped as well, so the
- * analogy with PCI is quite large):
- */
-#define __ISA_IO_base ((char *)(isa_slot_offset))
-
-/*
* The caches on some architectures aren't dma-coherent and have need to
* handle this in software. There are three types of operations that
* can be applied to dma buffers.