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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-06-02 15:31:39 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-02-19 08:52:22 +0300 |
| commit | fb1cecd40690e61e122d7249e7499c8d799feffb (patch) | |
| tree | c0d99812dd543d4c8647a662bf619c1d570c3ccb /firmware/av7110 | |
| parent | c86a4b621994dbe9361185362c4be6887f04b1a4 (diff) | |
| download | linux-fb1cecd40690e61e122d7249e7499c8d799feffb.tar.xz | |
ARM: dts: r8a7790: Add L2 cache-controller nodes
Add device nodes for the L2 caches, and link the CPU nodes to them.
The L2 cache for the Cortex-A15 CPU cores is 2 MiB large (organized as
128 KiB x 16 ways).
The L2 cache for the Cortex-A7 CPU cores is 512 KiB large (organized as
64 KiB x 8 ways).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'firmware/av7110')
0 files changed, 0 insertions, 0 deletions