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authorTariq Toukan <tariqt@mellanox.com>2019-01-22 16:25:50 +0300
committerDavid S. Miller <davem@davemloft.net>2019-01-25 08:54:13 +0300
commit5e5b9f6272f2c537c43bc80607079cdf8fdb50aa (patch)
treedd5a519de58a5f74ea990c5614f20926527d2418 /drivers
parent254764e55652d47fe81a54d7c226f3ba230180fe (diff)
downloadlinux-5e5b9f6272f2c537c43bc80607079cdf8fdb50aa.tar.xz
net/mlx4_core: A write memory barrier is sufficient in EQ ci update
Soften the memory barrier call of mb() by a sufficient wmb() in the consumer index update of the event queues. Suggested-by: Eric Dumazet <edumazet@google.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/eq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index 2f4201023836..a5be27772b8e 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -100,7 +100,7 @@ static void eq_set_ci(struct mlx4_eq *eq, int req_not)
req_not << 31),
eq->doorbell);
/* We still want ordering, just not swabbing, so add a barrier */
- mb();
+ wmb();
}
static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor,