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authorOleksij Rempel <o.rempel@pengutronix.de>2022-08-26 13:56:25 +0300
committerDavid S. Miller <davem@davemloft.net>2022-08-31 11:41:23 +0300
commitb5708dc6539d7630b4ddbd9f72a74280630770b8 (patch)
tree0b2d5762fd950941d50b4af39c41e426c7b4711d /drivers
parent9590fc4a2af55f92142ecbb724d999adf77a07c0 (diff)
downloadlinux-b5708dc6539d7630b4ddbd9f72a74280630770b8.tar.xz
net: dsa: microchip: KSZ9893: do not write to not supported Output Clock Control Register
This issue was detected after adding regmap register access validation. KSZ9893 compatible chips do not have "Output Clock Control Register 0x0103". So, avoid writing to it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/dsa/microchip/ksz9477.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
index f60ceaf25a66..fb9de6b447b1 100644
--- a/drivers/net/dsa/microchip/ksz9477.c
+++ b/drivers/net/dsa/microchip/ksz9477.c
@@ -193,6 +193,11 @@ int ksz9477_reset_switch(struct ksz_device *dev)
ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0x7F);
ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data32);
+ /* KSZ9893 compatible chips do not support refclk configuration */
+ if (dev->chip_id == KSZ9893_CHIP_ID ||
+ dev->chip_id == KSZ8563_CHIP_ID)
+ return 0;
+
data8 = SW_ENABLE_REFCLKO;
if (dev->synclko_disable)
data8 = 0;