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authorChris Wilson <chris@chris-wilson.co.uk>2017-02-22 14:40:47 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2017-02-22 15:12:14 +0300
commitf6aaba4dfbc8eaa1b2b756b989fb423a789ee4e8 (patch)
treec5ea2cd8091863c002ef912190177a6a24230f5e /drivers
parent5a97bcc69cc02d4da9599ed2c256b65fc3bd4ee7 (diff)
downloadlinux-f6aaba4dfbc8eaa1b2b756b989fb423a789ee4e8.tar.xz
drm/i915: Skip clflushes for all non-page backed objects
Generalise the skip for physical and stolen objects by skipping anything we do not have a valid address for inside the sg. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170222114049.28456-4-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c9ee2a99ffc0..00213c282796 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3140,14 +3140,19 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
* to GPU, and we can ignore the cache flush because it'll happen
* again at bind time.
*/
- if (!obj->mm.pages)
+ if (!obj->mm.pages) {
+ GEM_BUG_ON(obj->base.write_domain != I915_GEM_DOMAIN_CPU);
return;
+ }
/*
* Stolen memory is always coherent with the GPU as it is explicitly
* marked as wc by the system, or the system is cache-coherent.
+ * Similarly, we only access struct pages through the CPU cache, so
+ * anything not backed by physical memory we consider to be always
+ * coherent and not need clflushing.
*/
- if (obj->stolen || obj->phys_handle)
+ if (!i915_gem_object_has_struct_page(obj))
return;
/* If the GPU is snooping the contents of the CPU cache,