diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2022-07-18 11:31:41 +0300 |
|---|---|---|
| committer | Bartosz Golaszewski <brgl@bgdev.pl> | 2022-07-19 12:18:08 +0300 |
| commit | db8edaa09d7461ec08672a92a2eef63d5882bb79 (patch) | |
| tree | 41674b50244ce4e6e80d5e0c6b77013da77ac8d9 /drivers | |
| parent | ff6992735ade75aae3e35d16b17da1008d753d28 (diff) | |
| download | linux-db8edaa09d7461ec08672a92a2eef63d5882bb79.tar.xz | |
gpio: pca953x: only use single read/write for No AI mode
For the device use NO AI mode(not support auto address increment),
only use the single read/write when config the regmap.
We meet issue on PCA9557PW on i.MX8QXP/DXL evk board, this device
do not support AI mode, but when do the regmap sync, regmap will
sync 3 byte data to register 1, logically this means write first
data to register 1, write second data to register 2, write third data
to register 3. But this device do not support AI mode, finally, these
three data write only into register 1 one by one. the reault is the
value of register 1 alway equal to the latest data, here is the third
data, no operation happened on register 2 and register 3. This is
not what we expect.
Fixes: 49427232764d ("gpio: pca953x: Perform basic regmap conversion")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpio/gpio-pca953x.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 08bc52c3cdcb..7209f69a8e8d 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -351,6 +351,9 @@ static const struct regmap_config pca953x_i2c_regmap = { .reg_bits = 8, .val_bits = 8, + .use_single_read = true, + .use_single_write = true, + .readable_reg = pca953x_readable_register, .writeable_reg = pca953x_writeable_register, .volatile_reg = pca953x_volatile_register, |