diff options
| author | Jack Pham <jackp@codeaurora.org> | 2021-10-21 21:01:29 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-10-22 12:14:26 +0300 |
| commit | d1a4683747fe62905047b1ccd50405bc445cf86f (patch) | |
| tree | e9b7ec85ca304cefc2a7ebf08a4e7d4245f12e51 /drivers | |
| parent | 876a75cb520f5869533a30a6ca01545ec817b7a0 (diff) | |
| download | linux-d1a4683747fe62905047b1ccd50405bc445cf86f.tar.xz | |
usb: dwc3: Align DWC3_EP_* flag macros
Fix the DWC3_EP_* flag macros so that the definitions are all
lined up on the same tab column for consistent style.
No functional change.
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Link: https://lore.kernel.org/r/20211021180129.27938-2-jackp@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/usb/dwc3/core.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 2d62f5646fdf..620c8d3914d7 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -715,13 +715,13 @@ struct dwc3_ep { u32 saved_state; unsigned int flags; -#define DWC3_EP_ENABLED BIT(0) -#define DWC3_EP_STALL BIT(1) -#define DWC3_EP_WEDGE BIT(2) -#define DWC3_EP_TRANSFER_STARTED BIT(3) -#define DWC3_EP_END_TRANSFER_PENDING BIT(4) -#define DWC3_EP_PENDING_REQUEST BIT(5) -#define DWC3_EP_DELAY_START BIT(6) +#define DWC3_EP_ENABLED BIT(0) +#define DWC3_EP_STALL BIT(1) +#define DWC3_EP_WEDGE BIT(2) +#define DWC3_EP_TRANSFER_STARTED BIT(3) +#define DWC3_EP_END_TRANSFER_PENDING BIT(4) +#define DWC3_EP_PENDING_REQUEST BIT(5) +#define DWC3_EP_DELAY_START BIT(6) #define DWC3_EP_WAIT_TRANSFER_COMPLETE BIT(7) #define DWC3_EP_IGNORE_NEXT_NOSTREAM BIT(8) #define DWC3_EP_FORCE_RESTART_STREAM BIT(9) @@ -730,7 +730,7 @@ struct dwc3_ep { #define DWC3_EP_TXFIFO_RESIZED BIT(12) /* This last one is specific to EP0 */ -#define DWC3_EP0_DIR_IN BIT(31) +#define DWC3_EP0_DIR_IN BIT(31) /* * IMPORTANT: we *know* we have 256 TRBs in our @trb_pool, so we will |