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authorMatt Ranostay <mranostay@ti.com>2022-11-23 06:24:13 +0300
committerVinod Koul <vkoul@kernel.org>2022-11-24 21:11:41 +0300
commitbea3ce759b4664f20f1f57c53fe018c3b67da147 (patch)
treee47029a1787c55bb082eb60a851e1dbb98b9b789 /drivers
parentf12faa3be8e84fa9232a4654bccb30f46bbfee5c (diff)
downloadlinux-bea3ce759b4664f20f1f57c53fe018c3b67da147.tar.xz
phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support
Add support for j721s2-wiz-10g device which is similar to j721e-wiz-10g but uses clock-names interface versus explicitly defining clock nodes within device tree node. Signed-off-by: Matt Ranostay <mranostay@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20221123032413.1193961-3-mranostay@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/phy/ti/phy-j721e-wiz.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 141b51af4427..ddce5ef7711c 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -322,6 +322,7 @@ enum wiz_type {
AM64_WIZ_10G,
J7200_WIZ_10G, /* J7200 SR2.0 */
J784S4_WIZ_10G,
+ J721S2_WIZ_10G,
};
struct wiz_data {
@@ -1000,6 +1001,7 @@ static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node)
case AM64_WIZ_10G:
case J7200_WIZ_10G:
case J784S4_WIZ_10G:
+ case J721S2_WIZ_10G:
of_clk_del_provider(dev->of_node);
return;
default:
@@ -1132,6 +1134,7 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
case AM64_WIZ_10G:
case J7200_WIZ_10G:
case J784S4_WIZ_10G:
+ case J721S2_WIZ_10G:
ret = wiz_clock_register(wiz);
if (ret)
dev_err(dev, "Failed to register wiz clocks\n");
@@ -1214,6 +1217,7 @@ static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
break;
case J721E_WIZ_10G:
case J7200_WIZ_10G:
+ case J721S2_WIZ_10G:
if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);
break;
@@ -1318,6 +1322,15 @@ static struct wiz_data j784s4_10g_data = {
.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
};
+static struct wiz_data j721s2_10g_data = {
+ .type = J721S2_WIZ_10G,
+ .pll0_refclk_mux_sel = &pll0_refclk_mux_sel,
+ .pll1_refclk_mux_sel = &pll1_refclk_mux_sel,
+ .refclk_dig_sel = &refclk_dig_sel_10g,
+ .clk_mux_sel = clk_mux_sel_10g,
+ .clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
+};
+
static const struct of_device_id wiz_id_table[] = {
{
.compatible = "ti,j721e-wiz-16g", .data = &j721e_16g_data,
@@ -1334,6 +1347,9 @@ static const struct of_device_id wiz_id_table[] = {
{
.compatible = "ti,j784s4-wiz-10g", .data = &j784s4_10g_data,
},
+ {
+ .compatible = "ti,j721s2-wiz-10g", .data = &j721s2_10g_data,
+ },
{}
};
MODULE_DEVICE_TABLE(of, wiz_id_table);