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authorMoshe Shemesh <moshe@nvidia.com>2023-06-14 06:47:58 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2023-06-16 22:02:06 +0300
commit6f8551f8d9e44894ea9ca0748b5523767d7aeacb (patch)
treef853ae8cbe5c9ff3d594fe9e7c2f8e873974d2be /drivers
parent8bb42ed4210e342631f63d32f7ed87b722968da6 (diff)
downloadlinux-6f8551f8d9e44894ea9ca0748b5523767d7aeacb.tar.xz
net/mlx5: Check DTOR entry value is not zero
The Default Timeout Register (DTOR) provides timeout values to driver for flows that are device dependent. Zero value for DTOR entry is not valid and should not be used. In case of reading zero value from DTOR, the driver should use the hard coded SW default value instead. Signed-off-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c
index a87d0178ebf3..e223e0e46433 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c
@@ -119,7 +119,8 @@ u64 _mlx5_tout_ms(struct mlx5_core_dev *dev, enum mlx5_timeouts_types type)
#define MLX5_TIMEOUT_FILL(fld, reg_out, dev, to_type, to_extra) \
({ \
u64 fw_to = MLX5_TIMEOUT_QUERY(fld, reg_out); \
- tout_set(dev, fw_to + (to_extra), to_type); \
+ if (fw_to) \
+ tout_set(dev, fw_to + (to_extra), to_type); \
fw_to; \
})