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authorJonathan Marek <jonathan@marek.ca>2021-06-08 20:27:46 +0300
committerRob Clark <robdclark@chromium.org>2021-06-23 17:33:55 +0300
commit58e933e3f012d47d88ca35cd8688d4a31a0def4d (patch)
tree680de5ef9d23d1150f721be154e6a235cd5c10a3 /drivers
parent64245fc55172a0083814c5be193bf4891b9096e2 (diff)
downloadlinux-58e933e3f012d47d88ca35cd8688d4a31a0def4d.tar.xz
drm/msm/a6xx: add GMU_CX_GMU_CX_FALNEXT_INTF write for a650
downstream msm-5.14 kernel added a write to this register, so match that. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20210608172808.11803-4-jonathan@marek.ca Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/msm/adreno/a6xx_gmu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index e58e455573ba..b64e62323792 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -751,8 +751,10 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state)
int ret;
u32 chipid;
- if (adreno_is_a650(adreno_gpu))
+ if (adreno_is_a650(adreno_gpu)) {
+ gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 1);
gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 1);
+ }
if (state == GMU_WARM_BOOT) {
ret = a6xx_rpmh_start(gmu);