summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorAlexander Shiyan <shc_work@mail.ru>2013-11-29 15:39:29 +0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-12-09 10:41:48 +0400
commit71531f55a83dcb79b89287f6b11fb2e4eb496d4d (patch)
tree0bc285ba536bc15dc5d425b0de27e2a0a3607f3b /drivers
parenta0822637258b9e6132de669ac16dfe445c78e932 (diff)
downloadlinux-71531f55a83dcb79b89287f6b11fb2e4eb496d4d.tar.xz
w1: mxc_w1: Add warning for base frequency calculation
Base frequency should be as close as possible to 1 MHz. This patch adds warnings when clock is unreliable, according to i.MX datasheet. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Evgeniy Polyakov <zbr@ioremap.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/w1/masters/mxc_w1.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 5de3ca9b0fb9..953168c63392 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -105,6 +105,7 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
static int mxc_w1_probe(struct platform_device *pdev)
{
struct mxc_w1_device *mdev;
+ unsigned long clkrate;
struct resource *res;
unsigned int clkdiv;
int err = 0;
@@ -118,7 +119,16 @@ static int mxc_w1_probe(struct platform_device *pdev)
if (IS_ERR(mdev->clk))
return PTR_ERR(mdev->clk);
- clkdiv = (clk_get_rate(mdev->clk) / 1000000) - 1;
+ clkrate = clk_get_rate(mdev->clk);
+ if (clkrate < 10000000)
+ dev_warn(&pdev->dev,
+ "Low clock frequency causes improper function\n");
+
+ clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000);
+ clkrate /= clkdiv;
+ if ((clkrate < 980000) || (clkrate > 1020000))
+ dev_warn(&pdev->dev,
+ "Incorrect time base frequency %lu Hz\n", clkrate);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
mdev->regs = devm_ioremap_resource(&pdev->dev, res);
@@ -126,7 +136,7 @@ static int mxc_w1_probe(struct platform_device *pdev)
return PTR_ERR(mdev->regs);
clk_prepare_enable(mdev->clk);
- __raw_writeb(clkdiv, mdev->regs + MXC_W1_TIME_DIVIDER);
+ __raw_writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER);
mdev->bus_master.data = mdev;
mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus;