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authorTomi Valkeinen <tomi.valkeinen@ti.com>2010-07-30 13:39:34 +0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-05-11 15:20:13 +0400
commit2a89dc15331983621b772240ebef9dea2cbe5322 (patch)
tree04e174e0dc817d8acbed70d1122617b50f3f309e /drivers/video/omap2/dss/dsi.c
parent40885ab31f754426c2e9a40362e568778baa5e82 (diff)
downloadlinux-2a89dc15331983621b772240ebef9dea2cbe5322.tar.xz
OMAP: DSS2: DSI: add option to leave DSI lanes powered on
The DSI pins are powered by VDDS_DSI. If VDDS_DSI is off, the DSI pins are floating even if they are pinmuxed to, say, safe mode and there's a pull down/up. This patch gives the panel drivers an option to leave the VDDS_DSI power enabled while the DSS itself is turned off. This can be used to keep the DSI lanes in a valid state while DSS is off, if the DSI pins are muxed for pull down (not done in this patch). There will be a slight power consumption increase (~100 uA?) when the VDDS_DSI is left on, but because this option is used when the panel is left on, the regulator consumption is negligible compared to panel power consumption. When the panel is fully turned off the VDDS_DSI is also turned off. As an added bonus this will give us faster start up time when starting up the DSS and the regulator is already enabled. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dsi.c')
-rw-r--r--drivers/video/omap2/dss/dsi.c35
1 files changed, 24 insertions, 11 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index e2ae1e7372f2..9befbceba10c 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -246,6 +246,7 @@ static struct
struct dsi_clock_info current_cinfo;
+ bool vdds_dsi_enabled;
struct regulator *vdds_dsi_reg;
struct {
@@ -1445,9 +1446,12 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,
enable_clocks(1);
dsi_enable_pll_clock(1);
- r = regulator_enable(dsi.vdds_dsi_reg);
- if (r)
- goto err0;
+ if (!dsi.vdds_dsi_enabled) {
+ r = regulator_enable(dsi.vdds_dsi_reg);
+ if (r)
+ goto err0;
+ dsi.vdds_dsi_enabled = true;
+ }
/* XXX PLL does not come out of reset without this... */
dispc_pck_free_enable(1);
@@ -1481,21 +1485,28 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,
return 0;
err1:
- regulator_disable(dsi.vdds_dsi_reg);
+ if (dsi.vdds_dsi_enabled) {
+ regulator_disable(dsi.vdds_dsi_reg);
+ dsi.vdds_dsi_enabled = false;
+ }
err0:
enable_clocks(0);
dsi_enable_pll_clock(0);
return r;
}
-void dsi_pll_uninit(void)
+void dsi_pll_uninit(bool disconnect_lanes)
{
enable_clocks(0);
dsi_enable_pll_clock(0);
dsi.pll_locked = 0;
dsi_pll_power(DSI_PLL_POWER_OFF);
- regulator_disable(dsi.vdds_dsi_reg);
+ if (disconnect_lanes) {
+ WARN_ON(!dsi.vdds_dsi_enabled);
+ regulator_disable(dsi.vdds_dsi_reg);
+ dsi.vdds_dsi_enabled = false;
+ }
DSSDBG("PLL uninit done\n");
}
@@ -3642,12 +3653,13 @@ err2:
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_FCK);
err1:
- dsi_pll_uninit();
+ dsi_pll_uninit(true);
err0:
return r;
}
-static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev)
+static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev,
+ bool disconnect_lanes)
{
if (!dsi.ulps_enabled)
dsi_enter_ulps();
@@ -3662,7 +3674,7 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev)
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_FCK);
dsi_complexio_uninit();
- dsi_pll_uninit();
+ dsi_pll_uninit(disconnect_lanes);
}
static int dsi_core_init(void)
@@ -3731,7 +3743,8 @@ err0:
}
EXPORT_SYMBOL(omapdss_dsi_display_enable);
-void omapdss_dsi_display_disable(struct omap_dss_device *dssdev)
+void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
+ bool disconnect_lanes)
{
DSSDBG("dsi_display_disable\n");
@@ -3741,7 +3754,7 @@ void omapdss_dsi_display_disable(struct omap_dss_device *dssdev)
dsi_display_uninit_dispc(dssdev);
- dsi_display_uninit_dsi(dssdev);
+ dsi_display_uninit_dsi(dssdev, disconnect_lanes);
enable_clocks(0);
dsi_enable_pll_clock(0);