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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-06 20:22:02 +0400
committerVinod Koul <vinod.koul@intel.com>2013-01-08 14:53:05 +0400
commit1b140908c4cda43c653bb080c244d112e619008f (patch)
tree4ee653ced926928937db65f029bf19c6d42b7048 /drivers/usb
parente65f32ca21faed30ce37cd6480271697fe671f74 (diff)
downloadlinux-1b140908c4cda43c653bb080c244d112e619008f.tar.xz
dma: tegra: add support for channel wise pause
NVIDIA's some SoCs like Tegra114 support the channel wise pause control inplace of global pause which pauses all DMA channels. When SoCs support the channel wise pause control then it uses the global pause for clock gating for register access as well as all DMA channel pause. Hence DMA registers are not accessible if DMAs are globally paused on these new SoCs. Add support for channel wise pause feature if SoCs support it. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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