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| author | Anand Moon <linux.amoon@gmail.com> | 2020-03-10 22:48:53 +0300 |
|---|---|---|
| committer | Felipe Balbi <balbi@kernel.org> | 2020-03-15 12:08:27 +0300 |
| commit | 07f6842341abe978e6375078f84506ec3280ece5 (patch) | |
| tree | 09b08395693e295a0e83befafea323c516c6305f /drivers/usb/dwc3/dwc3-exynos.c | |
| parent | 238d760216541d345ee930e76c781f5cd1d22fba (diff) | |
| download | linux-07f6842341abe978e6375078f84506ec3280ece5.tar.xz | |
usb: dwc3: exynos: Add support for Exynos5422 suspend clk
Exynos5422 DWC3 module support two clk USBD300 and SCLK_USBD300
so add missing code to enable/disable code and suspend clk, for this
add a new compatible samsung,exynos5420-dwusb3 to help configure
dwc3 code and dwc3 suspend clock. Suspend clock controls the PHY power
change from P0 to P1/P2/P3 during U0 to U1/U2/U3 transition.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Diffstat (limited to 'drivers/usb/dwc3/dwc3-exynos.c')
| -rw-r--r-- | drivers/usb/dwc3/dwc3-exynos.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index 90bb022737da..48b68b6f0dc8 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -162,6 +162,12 @@ static const struct dwc3_exynos_driverdata exynos5250_drvdata = { .suspend_clk_idx = -1, }; +static const struct dwc3_exynos_driverdata exynos5420_drvdata = { + .clk_names = { "usbdrd30", "usbdrd30_susp_clk"}, + .num_clks = 2, + .suspend_clk_idx = 1, +}; + static const struct dwc3_exynos_driverdata exynos5433_drvdata = { .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" }, .num_clks = 4, @@ -179,6 +185,9 @@ static const struct of_device_id exynos_dwc3_match[] = { .compatible = "samsung,exynos5250-dwusb3", .data = &exynos5250_drvdata, }, { + .compatible = "samsung,exynos5420-dwusb3", + .data = &exynos5420_drvdata, + }, { .compatible = "samsung,exynos5433-dwusb3", .data = &exynos5433_drvdata, }, { |