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authorSherry Sun <sherry.sun@nxp.com>2021-04-27 05:12:26 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-05-13 17:07:57 +0300
commitfcb10ee27fb91b25b68d7745db9817ecea9f1038 (patch)
tree2c0c9aa678de749f13abafd7dbd176a64032ed02 /drivers/tty/serial
parent52008ebd62adc4f7da2518d638555c765c63388e (diff)
downloadlinux-fcb10ee27fb91b25b68d7745db9817ecea9f1038.tar.xz
tty: serial: fsl_lpuart: fix the potential risk of division or modulo by zero
We should be very careful about the register values that will be used for division or modulo operations, althrough the possibility that the UARTBAUD register value is zero is very low, but we had better to deal with the "bad data" of hardware in advance to avoid division or modulo by zero leading to undefined kernel behavior. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/20210427021226.27468-1-sherry.sun@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial')
-rw-r--r--drivers/tty/serial/fsl_lpuart.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 794035041744..777d54b593f8 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -2414,6 +2414,9 @@ lpuart32_console_get_options(struct lpuart_port *sport, int *baud,
bd = lpuart32_read(&sport->port, UARTBAUD);
bd &= UARTBAUD_SBR_MASK;
+ if (!bd)
+ return;
+
sbr = bd;
uartclk = lpuart_get_baud_clk_rate(sport);
/*