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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2023-04-12 17:50:52 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-04-20 14:47:33 +0300 |
| commit | d61ae331d6f35183b38e0c992bc01bf15d8591c3 (patch) | |
| tree | 806b6b57d783c3ac90068e733992d2d9f73776bd /drivers/tty/serial/sh-sci.h | |
| parent | 1707ce2d1e4d701db28ba2250d9d72dcf762babc (diff) | |
| download | linux-d61ae331d6f35183b38e0c992bc01bf15d8591c3.tar.xz | |
tty: serial: sh-sci: Add support for tx end interrupt handling
As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentioned
that, set the SCR.TIE bit to 0 and SCR.TEIE bit to 1, after the last
data to be transmitted are written to the TDR.
This will generate tx end interrupt and in the handler set SCR.TE and
SCR.TEIE to 0.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20230412145053.114847-5-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/sh-sci.h')
| -rw-r--r-- | drivers/tty/serial/sh-sci.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index c0ae78632dda..0b65563c4e9e 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h @@ -59,6 +59,9 @@ enum { #define SCSMR_SRC_19 0x0600 /* Sampling rate 1/19 */ #define SCSMR_SRC_27 0x0700 /* Sampling rate 1/27 */ +/* Serial Control Register, SCI only bits */ +#define SCSCR_TEIE BIT(2) /* Transmit End Interrupt Enable */ + /* Serial Control Register, SCIFA/SCIFB only bits */ #define SCSCR_TDRQE BIT(15) /* Tx Data Transfer Request Enable */ #define SCSCR_RDRQE BIT(14) /* Rx Data Transfer Request Enable */ |