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authorBert Vermeulen <bert@biot.com>2015-04-20 16:53:25 +0300
committerMark Brown <broonie@kernel.org>2015-04-20 23:34:59 +0300
commit4a1ae8be4563d29ddd36f46759191f4e867ed954 (patch)
tree8c15e56f9534896c22b4533bc403ddde91863b31 /drivers/spi/spi-rb4xx.c
parent05aec357871f892eea91d8b808f96a6091dd5310 (diff)
downloadlinux-4a1ae8be4563d29ddd36f46759191f4e867ed954.tar.xz
spi: rb4xx: Fix set_cs logic.
As it turns out, the set_cs() enable parameter refers to the logic level on the CS pin, not the state of chip selection. This broke functionality of the LEDs behind the CPLD, or at least delayed the commands until another one came in to toggle CS. Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-rb4xx.c')
-rw-r--r--drivers/spi/spi-rb4xx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-rb4xx.c b/drivers/spi/spi-rb4xx.c
index 9b449d4f9871..50f49f38e73c 100644
--- a/drivers/spi/spi-rb4xx.c
+++ b/drivers/spi/spi-rb4xx.c
@@ -90,7 +90,7 @@ static void rb4xx_set_cs(struct spi_device *spi, bool enable)
* since it's all on the same hardware register. However the
* CPLD needs CS deselected after every command.
*/
- if (!enable)
+ if (enable)
rb4xx_write(rbspi, AR71XX_SPI_REG_IOC,
AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1);
}