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| author | Mark Brown <broonie@kernel.org> | 2019-11-22 22:56:35 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-11-22 22:56:35 +0300 |
| commit | ca4196aa10087fe3ba3ce2383761898dc95b5e94 (patch) | |
| tree | f870402f36377f3bde4b939da23dda18bc9bc862 /drivers/spi/spi-fsl-qspi.c | |
| parent | 8f3ed6d0b0db04db8297d951c26c809dd7b4778d (diff) | |
| parent | ffa119f7c42d29be2dd759bb18cc4d1f45804c6b (diff) | |
| download | linux-ca4196aa10087fe3ba3ce2383761898dc95b5e94.tar.xz | |
Merge branch 'spi-5.5' into spi-next
Diffstat (limited to 'drivers/spi/spi-fsl-qspi.c')
| -rw-r--r-- | drivers/spi/spi-fsl-qspi.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c index 63c9f7edaf6c..79b1558b74b8 100644 --- a/drivers/spi/spi-fsl-qspi.c +++ b/drivers/spi/spi-fsl-qspi.c @@ -68,6 +68,11 @@ #define QUADSPI_FLSHCR_TCSH_MASK GENMASK(11, 8) #define QUADSPI_FLSHCR_TDH_MASK GENMASK(17, 16) +#define QUADSPI_BUF0CR 0x10 +#define QUADSPI_BUF1CR 0x14 +#define QUADSPI_BUF2CR 0x18 +#define QUADSPI_BUFXCR_INVALID_MSTRID 0xe + #define QUADSPI_BUF3CR 0x1c #define QUADSPI_BUF3CR_ALLMST_MASK BIT(31) #define QUADSPI_BUF3CR_ADATSZ(x) ((x) << 8) @@ -195,6 +200,7 @@ struct fsl_qspi_devtype_data { unsigned int rxfifo; unsigned int txfifo; + int invalid_mstrid; unsigned int ahb_buf_size; unsigned int quirks; bool little_endian; @@ -203,6 +209,7 @@ struct fsl_qspi_devtype_data { static const struct fsl_qspi_devtype_data vybrid_data = { .rxfifo = SZ_128, .txfifo = SZ_64, + .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID, .ahb_buf_size = SZ_1K, .quirks = QUADSPI_QUIRK_SWAP_ENDIAN, .little_endian = true, @@ -211,6 +218,7 @@ static const struct fsl_qspi_devtype_data vybrid_data = { static const struct fsl_qspi_devtype_data imx6sx_data = { .rxfifo = SZ_128, .txfifo = SZ_512, + .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID, .ahb_buf_size = SZ_1K, .quirks = QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_TKT245618, .little_endian = true, @@ -219,6 +227,7 @@ static const struct fsl_qspi_devtype_data imx6sx_data = { static const struct fsl_qspi_devtype_data imx7d_data = { .rxfifo = SZ_128, .txfifo = SZ_512, + .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID, .ahb_buf_size = SZ_1K, .quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_USE_TDH_SETTING, @@ -228,6 +237,7 @@ static const struct fsl_qspi_devtype_data imx7d_data = { static const struct fsl_qspi_devtype_data imx6ul_data = { .rxfifo = SZ_128, .txfifo = SZ_512, + .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID, .ahb_buf_size = SZ_1K, .quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_USE_TDH_SETTING, @@ -237,6 +247,7 @@ static const struct fsl_qspi_devtype_data imx6ul_data = { static const struct fsl_qspi_devtype_data ls1021a_data = { .rxfifo = SZ_128, .txfifo = SZ_64, + .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID, .ahb_buf_size = SZ_1K, .quirks = 0, .little_endian = false, @@ -246,6 +257,7 @@ static const struct fsl_qspi_devtype_data ls2080a_data = { .rxfifo = SZ_128, .txfifo = SZ_64, .ahb_buf_size = SZ_1K, + .invalid_mstrid = 0x0, .quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_BASE_INTERNAL, .little_endian = true, }; @@ -633,6 +645,7 @@ static int fsl_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) void __iomem *base = q->iobase; u32 addr_offset = 0; int err = 0; + int invalid_mstrid = q->devtype_data->invalid_mstrid; mutex_lock(&q->lock); @@ -656,6 +669,10 @@ static int fsl_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) qspi_writel(q, QUADSPI_SPTRCLR_BFPTRC | QUADSPI_SPTRCLR_IPPTRC, base + QUADSPI_SPTRCLR); + qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF0CR); + qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF1CR); + qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF2CR); + fsl_qspi_prepare_lut(q, op); /* |