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| author | Amit Cohen <amcohen@nvidia.com> | 2022-06-29 12:39:58 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-06-29 15:35:46 +0300 |
| commit | 4abaa5cc4d7c42ae61ce482acc5aa1e1cededc73 (patch) | |
| tree | 6cc53236010eb311eec278f9750cb8fb60bf788e /drivers/scsi/scsi_sas_internal.h | |
| parent | d640516a65d8bec3e5f9ddccc3e15503277c7cbb (diff) | |
| download | linux-4abaa5cc4d7c42ae61ce482acc5aa1e1cededc73.tar.xz | |
mlxsw: Align PGT index to legacy bridge model
FID code reserves about 15K entries in PGT table for flooding. These
entries are just allocated and are not used yet because the code that uses
them is skipped now.
The next patches will convert MDB code to use PGT APIs. The allocation of
indexes for multicast is done after FID code reserves 15K entries.
Currently, legacy bridge model is used and firmware manages PGT table. That
means that the indexes which are allocated using PGT API are too high when
legacy bridge model is used. To not exceed firmware limitation for MDB
entries, add an API that returns the correct 'mid_index', based on bridge
model. For legacy model, subtract the number of flood entries from PGT
index. Use it to write the correct MID to SMID register. This API will be
used also from MDB code in the next patches.
PGT should not be aware of MDB and FID different usage, this API is
temporary and will be removed once unified bridge model will be used.
Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/scsi/scsi_sas_internal.h')
0 files changed, 0 insertions, 0 deletions