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authorSuganath Prabu S <suganath-prabu.subramani@broadcom.com>2019-01-29 15:14:42 +0300
committerMartin K. Petersen <martin.petersen@oracle.com>2019-02-05 06:52:21 +0300
commiteb9c7ce560453349652394ce493ac2d2b47f2b65 (patch)
treec2fa84e7ada6022635f59c0cc70e1aaadf7dd9e3 /drivers/scsi/mpt3sas/mpt3sas_scsih.c
parent8f8384503e40c65cfe36b82772c5b7a6403abc5b (diff)
downloadlinux-eb9c7ce560453349652394ce493ac2d2b47f2b65.tar.xz
scsi: mpt3sas: Add support for ATLAS PCIe switch
Add Atlas PCIe Switch Management Port device PNPID, Vendor Id: 0x1000 device Id: 0x00B2 This device is based on MPI 2.6 spec and it exposes one SES device to accept management commands for the PCIe switch. Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/mpt3sas/mpt3sas_scsih.c')
-rw-r--r--drivers/scsi/mpt3sas/mpt3sas_scsih.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
index 4a73753dbb9b..8bb5b8f9f4d2 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
@@ -10283,6 +10283,7 @@ _scsih_determine_hba_mpi_version(struct pci_dev *pdev)
case MPI26_MFGPAGE_DEVID_SAS3516_1:
case MPI26_MFGPAGE_DEVID_SAS3416:
case MPI26_MFGPAGE_DEVID_SAS3616:
+ case MPI26_ATLAS_PCIe_SWITCH_DEVID:
case MPI26_MFGPAGE_DEVID_CFG_SEC_3916:
case MPI26_MFGPAGE_DEVID_HARD_SEC_3916:
case MPI26_MFGPAGE_DEVID_CFG_SEC_3816:
@@ -10373,6 +10374,7 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
case MPI26_MFGPAGE_DEVID_SAS3516_1:
case MPI26_MFGPAGE_DEVID_SAS3416:
case MPI26_MFGPAGE_DEVID_SAS3616:
+ case MPI26_ATLAS_PCIe_SWITCH_DEVID:
ioc->is_gen35_ioc = 1;
break;
case MPI26_MFGPAGE_DEVID_CFG_SEC_3816:
@@ -10853,6 +10855,10 @@ static const struct pci_device_id mpt3sas_pci_table[] = {
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_3916,
PCI_ANY_ID, PCI_ANY_ID },
+ /* Atlas PCIe Switch Management Port */
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_ATLAS_PCIe_SWITCH_DEVID,
+ PCI_ANY_ID, PCI_ANY_ID },
+
/* Sea SI 0x00E5 Configurable Secure
* 0x00E6 Hard Secure
*/