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| author | Suganath Prabu S <suganath-prabu.subramani@broadcom.com> | 2018-02-14 13:16:37 +0300 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2018-02-28 06:26:16 +0300 |
| commit | 40114bde9773ccaf9ad77233ac2cc9039f0f2941 (patch) | |
| tree | 4ef383b5438d69e314144dfa642e73c9d6d75998 /drivers/scsi/mpt3sas/mpt3sas_base.h | |
| parent | b4472d7180894c96b6133ef5ff3df50836591eaa (diff) | |
| download | linux-40114bde9773ccaf9ad77233ac2cc9039f0f2941.tar.xz | |
scsi: mpt3sas: Do not use 32-bit atomic request descriptor for Ventura controllers.
Sending I/O through 32 bit descriptors to Ventura series of controller
results in IO timeout on certain conditions. This error only occurs on
systems with high I/O activity.
Changes in this patch will prevent driver from using 32 bit descriptor
and use 64 bit Descriptors
Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/mpt3sas/mpt3sas_base.h')
| -rw-r--r-- | drivers/scsi/mpt3sas/mpt3sas_base.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index 4fd582bd14b3..68bffaebe900 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -1354,12 +1354,7 @@ struct MPT3SAS_ADAPTER { void *device_remove_in_progress; u16 device_remove_in_progress_sz; u8 is_gen35_ioc; - u8 atomic_desc_capable; PUT_SMID_IO_FP_HIP put_smid_scsi_io; - PUT_SMID_IO_FP_HIP put_smid_fast_path; - PUT_SMID_IO_FP_HIP put_smid_hi_priority; - PUT_SMID_DEFAULT put_smid_default; - PUT_SMID_DEFAULT put_smid_nvme_encap; }; @@ -1400,6 +1395,12 @@ void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc); +void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, + u16 handle); +void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, + u16 msix_task); +void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid); +void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid); /* hi-priority queue */ u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, |