diff options
| author | Jing Huang <huangj@brocade.com> | 2010-07-09 06:54:39 +0400 |
|---|---|---|
| committer | James Bottomley <James.Bottomley@suse.de> | 2010-07-27 21:04:15 +0400 |
| commit | df2a52a6c8c4995e0bec0b739ddb2f51664837dd (patch) | |
| tree | 7599da343cb246d041cda0f9b38794859a077aeb /drivers/scsi/bfa/bfa_ioc_ct.c | |
| parent | 9aeb6802ddc06b66fc1a58a882fa54bba37040b3 (diff) | |
| download | linux-df2a52a6c8c4995e0bec0b739ddb2f51664837dd.tar.xz | |
[SCSI] bfa: fix chip and memory initialization
Clear PSS memory reset that is set as part of power-on-reset (pci reset).
Complete PMM memory reset before BISTR start. Clear EDRAM BISTR start bit
after fixed delay. BISTR DONE bit status is not getting set. Use a fixed
1ms delay for BISTR now. Expose PMM IT memory definitions to host.
Signed-off-by: Jing Huang <huangj@brocade.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/bfa/bfa_ioc_ct.c')
| -rw-r--r-- | drivers/scsi/bfa/bfa_ioc_ct.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/scsi/bfa/bfa_ioc_ct.c b/drivers/scsi/bfa/bfa_ioc_ct.c index 17bd1513b34e..68f027da001e 100644 --- a/drivers/scsi/bfa/bfa_ioc_ct.c +++ b/drivers/scsi/bfa/bfa_ioc_ct.c @@ -376,10 +376,35 @@ bfa_ioc_ct_pll_init(struct bfa_ioc_s *ioc) bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, pll_fclk | __APP_PLL_425_ENABLE); + /** + * PSS memory reset is asserted at power-on-reset. Need to clear + * this before running EDRAM BISTR + */ + if (ioc->cna) { + bfa_reg_write((rb + PMM_1T_RESET_REG_P0), __PMM_1T_RESET_P); + bfa_reg_write((rb + PMM_1T_RESET_REG_P1), __PMM_1T_RESET_P); + } + + r32 = bfa_reg_read((rb + PSS_CTL_REG)); + r32 &= ~__PSS_LMEM_RESET; + bfa_reg_write((rb + PSS_CTL_REG), r32); + bfa_os_udelay(1000); + + if (ioc->cna) { + bfa_reg_write((rb + PMM_1T_RESET_REG_P0), 0); + bfa_reg_write((rb + PMM_1T_RESET_REG_P1), 0); + } + bfa_reg_write((rb + MBIST_CTL_REG), __EDRAM_BISTR_START); bfa_os_udelay(1000); r32 = bfa_reg_read((rb + MBIST_STAT_REG)); bfa_trc(ioc, r32); + + /** + * Clear BISTR + */ + bfa_reg_write((rb + MBIST_CTL_REG), 0); + /* * release semaphore. */ |