diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-12-31 10:31:57 +0300 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-12-31 10:31:57 +0300 |
commit | a9de18eb761f7c1c860964b2e5addc1a35c7e861 (patch) | |
tree | 886e75fdfd09690cd262ca69cb7f5d1d42b48602 /drivers/scsi/aic7xxx/aic79xx_reg.h_shipped | |
parent | b2aaf8f74cdc84a9182f6cabf198b7763bcb9d40 (diff) | |
parent | 6a94cb73064c952255336cc57731904174b2c58f (diff) | |
download | linux-a9de18eb761f7c1c860964b2e5addc1a35c7e861.tar.xz |
Merge branch 'linus' into stackprotector
Conflicts:
arch/x86/include/asm/pda.h
kernel/fork.c
Diffstat (limited to 'drivers/scsi/aic7xxx/aic79xx_reg.h_shipped')
-rw-r--r-- | drivers/scsi/aic7xxx/aic79xx_reg.h_shipped | 567 |
1 files changed, 133 insertions, 434 deletions
diff --git a/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped b/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped index c21ceab8e913..cdcead071ef6 100644 --- a/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped +++ b/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped @@ -34,13 +34,6 @@ ahd_reg_print_t ahd_seqintcode_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_clrint_print; -#else -#define ahd_clrint_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CLRINT", 0x03, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_error_print; #else #define ahd_error_print(regvalue, cur_col, wrap) \ @@ -48,20 +41,6 @@ ahd_reg_print_t ahd_error_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_hcntrl_print; -#else -#define ahd_hcntrl_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "HCNTRL", 0x05, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_hnscb_qoff_print; -#else -#define ahd_hnscb_qoff_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "HNSCB_QOFF", 0x06, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_hescb_qoff_print; #else #define ahd_hescb_qoff_print(regvalue, cur_col, wrap) \ @@ -97,13 +76,6 @@ ahd_reg_print_t ahd_swtimer_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_snscb_qoff_print; -#else -#define ahd_snscb_qoff_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SNSCB_QOFF", 0x10, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_sescb_qoff_print; #else #define ahd_sescb_qoff_print(regvalue, cur_col, wrap) \ @@ -111,20 +83,6 @@ ahd_reg_print_t ahd_sescb_qoff_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sdscb_qoff_print; -#else -#define ahd_sdscb_qoff_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SDSCB_QOFF", 0x14, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_qoff_ctlsta_print; -#else -#define ahd_qoff_ctlsta_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "QOFF_CTLSTA", 0x16, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_intctl_print; #else #define ahd_intctl_print(regvalue, cur_col, wrap) \ @@ -139,13 +97,6 @@ ahd_reg_print_t ahd_dfcntrl_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_dscommand0_print; -#else -#define ahd_dscommand0_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "DSCOMMAND0", 0x19, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_dfstatus_print; #else #define ahd_dfstatus_print(regvalue, cur_col, wrap) \ @@ -160,13 +111,6 @@ ahd_reg_print_t ahd_sg_cache_shadow_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sg_cache_pre_print; -#else -#define ahd_sg_cache_pre_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SG_CACHE_PRE", 0x1b, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_lqin_print; #else #define ahd_lqin_print(regvalue, cur_col, wrap) \ @@ -293,13 +237,6 @@ ahd_reg_print_t ahd_sxfrctl0_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sxfrctl1_print; -#else -#define ahd_sxfrctl1_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SXFRCTL1", 0x3d, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_dffstat_print; #else #define ahd_dffstat_print(regvalue, cur_col, wrap) \ @@ -314,13 +251,6 @@ ahd_reg_print_t ahd_multargid_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scsisigo_print; -#else -#define ahd_scsisigo_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCSISIGO", 0x40, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_scsisigi_print; #else #define ahd_scsisigi_print(regvalue, cur_col, wrap) \ @@ -363,13 +293,6 @@ ahd_reg_print_t ahd_selid_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_optionmode_print; -#else -#define ahd_optionmode_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "OPTIONMODE", 0x4a, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_sblkctl_print; #else #define ahd_sblkctl_print(regvalue, cur_col, wrap) \ @@ -391,13 +314,6 @@ ahd_reg_print_t ahd_simode0_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_clrsint0_print; -#else -#define ahd_clrsint0_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CLRSINT0", 0x4b, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_sstat1_print; #else #define ahd_sstat1_print(regvalue, cur_col, wrap) \ @@ -405,13 +321,6 @@ ahd_reg_print_t ahd_sstat1_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_clrsint1_print; -#else -#define ahd_clrsint1_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CLRSINT1", 0x4c, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_sstat2_print; #else #define ahd_sstat2_print(regvalue, cur_col, wrap) \ @@ -461,17 +370,17 @@ ahd_reg_print_t ahd_lqistat0_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_lqimode0_print; +ahd_reg_print_t ahd_clrlqiint0_print; #else -#define ahd_lqimode0_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap) +#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_clrlqiint0_print; +ahd_reg_print_t ahd_lqimode0_print; #else -#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap) +#define ahd_lqimode0_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS @@ -629,17 +538,17 @@ ahd_reg_print_t ahd_seqintsrc_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_seqimode_print; +ahd_reg_print_t ahd_currscb_print; #else -#define ahd_seqimode_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SEQIMODE", 0x5c, regvalue, cur_col, wrap) +#define ahd_currscb_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_currscb_print; +ahd_reg_print_t ahd_seqimode_print; #else -#define ahd_currscb_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap) +#define ahd_seqimode_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "SEQIMODE", 0x5c, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS @@ -657,13 +566,6 @@ ahd_reg_print_t ahd_lastscb_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_shaddr_print; -#else -#define ahd_shaddr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SHADDR", 0x60, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_negoaddr_print; #else #define ahd_negoaddr_print(regvalue, cur_col, wrap) \ @@ -748,27 +650,6 @@ ahd_reg_print_t ahd_seloid_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_haddr_print; -#else -#define ahd_haddr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "HADDR", 0x70, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_hcnt_print; -#else -#define ahd_hcnt_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "HCNT", 0x78, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sghaddr_print; -#else -#define ahd_sghaddr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_scbhaddr_print; #else #define ahd_scbhaddr_print(regvalue, cur_col, wrap) \ @@ -776,10 +657,10 @@ ahd_reg_print_t ahd_scbhaddr_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sghcnt_print; +ahd_reg_print_t ahd_sghaddr_print; #else -#define ahd_sghcnt_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap) +#define ahd_sghaddr_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS @@ -790,10 +671,10 @@ ahd_reg_print_t ahd_scbhcnt_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_dff_thrsh_print; +ahd_reg_print_t ahd_sghcnt_print; #else -#define ahd_dff_thrsh_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "DFF_THRSH", 0x88, regvalue, cur_col, wrap) +#define ahd_sghcnt_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS @@ -867,13 +748,6 @@ ahd_reg_print_t ahd_targpcistat_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scbptr_print; -#else -#define ahd_scbptr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCBPTR", 0xa8, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_scbautoptr_print; #else #define ahd_scbautoptr_print(regvalue, cur_col, wrap) \ @@ -881,13 +755,6 @@ ahd_reg_print_t ahd_scbautoptr_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_ccsgaddr_print; -#else -#define ahd_ccsgaddr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CCSGADDR", 0xac, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_ccscbaddr_print; #else #define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \ @@ -909,13 +776,6 @@ ahd_reg_print_t ahd_ccsgctl_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_ccsgram_print; -#else -#define ahd_ccsgram_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "CCSGRAM", 0xb0, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_ccscbram_print; #else #define ahd_ccscbram_print(regvalue, cur_col, wrap) \ @@ -930,13 +790,6 @@ ahd_reg_print_t ahd_brddat_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_brdctl_print; -#else -#define ahd_brdctl_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "BRDCTL", 0xb9, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_seeadr_print; #else #define ahd_seeadr_print(regvalue, cur_col, wrap) \ @@ -972,13 +825,6 @@ ahd_reg_print_t ahd_dspdatactl_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_dfdat_print; -#else -#define ahd_dfdat_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "DFDAT", 0xc4, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_dspselect_print; #else #define ahd_dspselect_print(regvalue, cur_col, wrap) \ @@ -1000,13 +846,6 @@ ahd_reg_print_t ahd_seqctl0_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_flags_print; -#else -#define ahd_flags_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "FLAGS", 0xd8, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_seqintctl_print; #else #define ahd_seqintctl_print(regvalue, cur_col, wrap) \ @@ -1014,13 +853,6 @@ ahd_reg_print_t ahd_seqintctl_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_seqram_print; -#else -#define ahd_seqram_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SEQRAM", 0xda, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_prgmcnt_print; #else #define ahd_prgmcnt_print(regvalue, cur_col, wrap) \ @@ -1028,41 +860,6 @@ ahd_reg_print_t ahd_prgmcnt_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_accum_print; -#else -#define ahd_accum_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "ACCUM", 0xe0, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sindex_print; -#else -#define ahd_sindex_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SINDEX", 0xe2, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_dindex_print; -#else -#define ahd_dindex_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "DINDEX", 0xe4, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_allones_print; -#else -#define ahd_allones_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "ALLONES", 0xe8, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_allzeros_print; -#else -#define ahd_allzeros_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "ALLZEROS", 0xea, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_none_print; #else #define ahd_none_print(regvalue, cur_col, wrap) \ @@ -1070,27 +867,6 @@ ahd_reg_print_t ahd_none_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sindir_print; -#else -#define ahd_sindir_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SINDIR", 0xec, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_dindir_print; -#else -#define ahd_dindir_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "DINDIR", 0xed, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_stack_print; -#else -#define ahd_stack_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "STACK", 0xf2, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_intvec1_addr_print; #else #define ahd_intvec1_addr_print(regvalue, cur_col, wrap) \ @@ -1126,17 +902,17 @@ ahd_reg_print_t ahd_accum_save_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_sram_base_print; +ahd_reg_print_t ahd_waiting_scb_tails_print; #else -#define ahd_sram_base_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap) +#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_waiting_scb_tails_print; +ahd_reg_print_t ahd_sram_base_print; #else -#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap) +#define ahd_sram_base_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS @@ -1224,13 +1000,6 @@ ahd_reg_print_t ahd_msg_out_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_dmaparams_print; -#else -#define ahd_dmaparams_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "DMAPARAMS", 0x138, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_seq_flags_print; #else #define ahd_seq_flags_print(regvalue, cur_col, wrap) \ @@ -1238,20 +1007,6 @@ ahd_reg_print_t ahd_seq_flags_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_saved_scsiid_print; -#else -#define ahd_saved_scsiid_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SAVED_SCSIID", 0x13a, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_saved_lun_print; -#else -#define ahd_saved_lun_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SAVED_LUN", 0x13b, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_lastphase_print; #else #define ahd_lastphase_print(regvalue, cur_col, wrap) \ @@ -1273,20 +1028,6 @@ ahd_reg_print_t ahd_kernel_tqinpos_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_tqinpos_print; -#else -#define ahd_tqinpos_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "TQINPOS", 0x13f, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_shared_data_addr_print; -#else -#define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x140, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_qoutfifo_next_addr_print; #else #define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \ @@ -1294,20 +1035,6 @@ ahd_reg_print_t ahd_qoutfifo_next_addr_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_arg_1_print; -#else -#define ahd_arg_1_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "ARG_1", 0x148, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_arg_2_print; -#else -#define ahd_arg_2_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "ARG_2", 0x149, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_last_msg_print; #else #define ahd_last_msg_print(regvalue, cur_col, wrap) \ @@ -1406,13 +1133,6 @@ ahd_reg_print_t ahd_mk_message_scsiid_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scb_residual_datacnt_print; -#else -#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_scb_base_print; #else #define ahd_scb_base_print(regvalue, cur_col, wrap) \ @@ -1420,17 +1140,10 @@ ahd_reg_print_t ahd_scb_base_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scb_residual_sgptr_print; -#else -#define ahd_scb_residual_sgptr_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR", 0x184, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scb_scsi_status_print; +ahd_reg_print_t ahd_scb_residual_datacnt_print; #else -#define ahd_scb_scsi_status_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCB_SCSI_STATUS", 0x188, regvalue, cur_col, wrap) +#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \ + ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap) #endif #if AIC_DEBUG_REGISTERS @@ -1476,13 +1189,6 @@ ahd_reg_print_t ahd_scb_task_attribute_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scb_cdb_len_print; -#else -#define ahd_scb_cdb_len_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCB_CDB_LEN", 0x196, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_scb_task_management_print; #else #define ahd_scb_task_management_print(regvalue, cur_col, wrap) \ @@ -1518,13 +1224,6 @@ ahd_reg_print_t ahd_scb_busaddr_print; #endif #if AIC_DEBUG_REGISTERS -ahd_reg_print_t ahd_scb_next_print; -#else -#define ahd_scb_next_print(regvalue, cur_col, wrap) \ - ahd_print_register(NULL, 0, "SCB_NEXT", 0x1ac, regvalue, cur_col, wrap) -#endif - -#if AIC_DEBUG_REGISTERS ahd_reg_print_t ahd_scb_next2_print; #else #define ahd_scb_next2_print(regvalue, cur_col, wrap) \ @@ -1717,10 +1416,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define SG_CACHE_PRE 0x1b -#define TYPEPTR 0x20 - #define LQIN 0x20 +#define TYPEPTR 0x20 + #define TAGPTR 0x21 #define LUNPTR 0x22 @@ -1780,6 +1479,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define SINGLECMD 0x02 #define ABORTPENDING 0x01 +#define SCSBIST0 0x39 +#define GSBISTERR 0x40 +#define GSBISTDONE 0x20 +#define GSBISTRUN 0x10 +#define OSBISTERR 0x04 +#define OSBISTDONE 0x02 +#define OSBISTRUN 0x01 + #define LQCTL2 0x39 #define LQIRETRY 0x80 #define LQICONTINUE 0x40 @@ -1790,13 +1497,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define LQOTOIDLE 0x02 #define LQOPAUSE 0x01 -#define SCSBIST0 0x39 -#define GSBISTERR 0x40 -#define GSBISTDONE 0x20 -#define GSBISTRUN 0x10 -#define OSBISTERR 0x04 -#define OSBISTDONE 0x02 -#define OSBISTRUN 0x01 +#define SCSBIST1 0x3a +#define NTBISTERR 0x04 +#define NTBISTDONE 0x02 +#define NTBISTRUN 0x01 #define SCSISEQ0 0x3a #define TEMODEO 0x80 @@ -1805,15 +1509,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define FORCEBUSFREE 0x10 #define SCSIRSTO 0x01 -#define SCSBIST1 0x3a -#define NTBISTERR 0x04 -#define NTBISTDONE 0x02 -#define NTBISTRUN 0x01 - #define SCSISEQ1 0x3b -#define BUSINITID 0x3c - #define SXFRCTL0 0x3c #define DFON 0x80 #define DFPEXP 0x40 @@ -1822,6 +1519,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define DLCOUNT 0x3c +#define BUSINITID 0x3c + #define SXFRCTL1 0x3d #define BITBUCKET 0x80 #define ENSACHK 0x40 @@ -1846,8 +1545,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define CURRFIFO_1 0x01 #define CURRFIFO_0 0x00 -#define MULTARGID 0x40 - #define SCSISIGO 0x40 #define CDO 0x80 #define IOO 0x40 @@ -1858,6 +1555,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define REQO 0x02 #define ACKO 0x01 +#define MULTARGID 0x40 + #define SCSISIGI 0x41 #define ATNI 0x10 #define SELI 0x08 @@ -1904,6 +1603,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define ENAB20 0x04 #define SELWIDE 0x02 +#define CLRSINT0 0x4b +#define CLRSELDO 0x40 +#define CLRSELDI 0x20 +#define CLRSELINGO 0x10 +#define CLRIOERR 0x08 +#define CLROVERRUN 0x04 +#define CLRSPIORDY 0x02 +#define CLRARBDO 0x01 + #define SSTAT0 0x4b #define TARGET 0x80 #define SELDO 0x40 @@ -1923,14 +1631,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define ENSPIORDY 0x02 #define ENARBDO 0x01 -#define CLRSINT0 0x4b -#define CLRSELDO 0x40 -#define CLRSELDI 0x20 -#define CLRSELINGO 0x10 -#define CLRIOERR 0x08 -#define CLROVERRUN 0x04 -#define CLRSPIORDY 0x02 -#define CLRARBDO 0x01 +#define CLRSINT1 0x4c +#define CLRSELTIMEO 0x80 +#define CLRATNO 0x40 +#define CLRSCSIRSTI 0x20 +#define CLRBUSFREE 0x08 +#define CLRSCSIPERR 0x04 +#define CLRSTRB2FAST 0x02 +#define CLRREQINIT 0x01 #define SSTAT1 0x4c #define SELTO 0x80 @@ -1942,15 +1650,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define STRB2FAST 0x02 #define REQINIT 0x01 -#define CLRSINT1 0x4c -#define CLRSELTIMEO 0x80 -#define CLRATNO 0x40 -#define CLRSCSIRSTI 0x20 -#define CLRBUSFREE 0x08 -#define CLRSCSIPERR 0x04 -#define CLRSTRB2FAST 0x02 -#define CLRREQINIT 0x01 - #define SSTAT2 0x4d #define BUSFREETIME 0xc0 #define NONPACKREQ 0x20 @@ -1998,14 +1697,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define LQIATNLQ 0x02 #define LQIATNCMD 0x01 -#define LQIMODE0 0x50 -#define ENLQIATNQASK 0x20 -#define ENLQICRCT1 0x10 -#define ENLQICRCT2 0x08 -#define ENLQIBADLQT 0x04 -#define ENLQIATNLQ 0x02 -#define ENLQIATNCMD 0x01 - #define CLRLQIINT0 0x50 #define CLRLQIATNQAS 0x20 #define CLRLQICRCT1 0x10 @@ -2014,6 +1705,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define CLRLQIATNLQ 0x02 #define CLRLQIATNCMD 0x01 +#define LQIMODE0 0x50 +#define ENLQIATNQASK 0x20 +#define ENLQICRCT1 0x10 +#define ENLQICRCT2 0x08 +#define ENLQIBADLQT 0x04 +#define ENLQIATNLQ 0x02 +#define ENLQIATNCMD 0x01 + #define LQIMODE1 0x51 #define ENLQIPHASE_LQ 0x80 #define ENLQIPHASE_NLQ 0x40 @@ -2160,6 +1859,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define CFG4ICMD 0x02 #define CFG4TCMD 0x01 +#define CURRSCB 0x5c + #define SEQIMODE 0x5c #define ENCTXTDONE 0x40 #define ENSAVEPTRS 0x20 @@ -2169,8 +1870,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define ENCFG4ICMD 0x02 #define ENCFG4TCMD 0x01 -#define CURRSCB 0x5c - #define MDFFSTAT 0x5d #define SHCNTNEGATIVE 0x40 #define SHCNTMINUS1 0x20 @@ -2185,29 +1884,29 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define DFFTAG 0x5e +#define LASTSCB 0x5e + #define SCSITEST 0x5e #define CNTRTEST 0x08 #define SEL_TXPLL_DEBUG 0x04 -#define LASTSCB 0x5e - #define IOPDNCTL 0x5f #define DISABLE_OE 0x80 #define PDN_IDIST 0x04 #define PDN_DIFFSENSE 0x01 -#define DGRPCRCI 0x60 - #define SHADDR 0x60 #define NEGOADDR 0x60 -#define NEGPERIOD 0x61 +#define DGRPCRCI 0x60 -#define NEGOFFSET 0x62 +#define NEGPERIOD 0x61 #define PACKCRCI 0x62 +#define NEGOFFSET 0x62 + #define NEGPPROPTS 0x63 #define PPROPT_PACE 0x08 #define PPROPT_QAS 0x04 @@ -2253,8 +1952,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define SELOID 0x6b -#define FAIRNESS 0x6c - #define PLL400CTL0 0x6c #define PLL_VCOSEL 0x80 #define PLL_PWDN 0x40 @@ -2264,6 +1961,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define PLL_DLPF 0x02 #define PLL_ENFBM 0x01 +#define FAIRNESS 0x6c + #define PLL400CTL1 0x6d #define PLL_CNTEN 0x80 #define PLL_CNTCLR 0x40 @@ -2275,25 +1974,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define HADDR 0x70 -#define HODMAADR 0x70 - #define PLLDELAY 0x70 #define SPLIT_DROP_REQ 0x80 -#define HCNT 0x78 +#define HODMAADR 0x70 #define HODMACNT 0x78 -#define HODMAEN 0x7a +#define HCNT 0x78 -#define SGHADDR 0x7c +#define HODMAEN 0x7a #define SCBHADDR 0x7c -#define SGHCNT 0x84 +#define SGHADDR 0x7c #define SCBHCNT 0x84 +#define SGHCNT 0x84 + #define DFF_THRSH 0x88 #define WR_DFTHRSH 0x70 #define RD_DFTHRSH 0x07 @@ -2326,10 +2025,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define CMCRXMSG0 0x90 -#define OVLYRXMSG0 0x90 - -#define DCHRXMSG0 0x90 - #define ROENABLE 0x90 #define MSIROEN 0x20 #define OVLYROEN 0x10 @@ -2338,11 +2033,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define DCH1ROEN 0x02 #define DCH0ROEN 0x01 -#define OVLYRXMSG1 0x91 +#define OVLYRXMSG0 0x90 -#define CMCRXMSG1 0x91 +#define DCHRXMSG0 0x90 -#define DCHRXMSG1 0x91 +#define OVLYRXMSG1 0x91 #define NSENABLE 0x91 #define MSINSEN 0x20 @@ -2352,6 +2047,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define DCH1NSEN 0x02 #define DCH0NSEN 0x01 +#define CMCRXMSG1 0x91 + +#define DCHRXMSG1 0x91 + #define DCHRXMSG2 0x92 #define CMCRXMSG2 0x92 @@ -2375,24 +2074,24 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define TSCSERREN 0x02 #define CMPABCDIS 0x01 -#define CMCSEQBCNT 0x94 - #define OVLYSEQBCNT 0x94 #define DCHSEQBCNT 0x94 +#define CMCSEQBCNT 0x94 + +#define CMCSPLTSTAT0 0x96 + #define DCHSPLTSTAT0 0x96 #define OVLYSPLTSTAT0 0x96 -#define CMCSPLTSTAT0 0x96 +#define CMCSPLTSTAT1 0x97 #define OVLYSPLTSTAT1 0x97 #define DCHSPLTSTAT1 0x97 -#define CMCSPLTSTAT1 0x97 - #define SGRXMSG0 0x98 #define CDNUM 0xf8 #define CFNUM 0x07 @@ -2420,15 +2119,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define TAG_NUM 0x1f #define RLXORD 0x10 +#define SGSEQBCNT 0x9c + #define SLVSPLTOUTATTR0 0x9c #define LOWER_BCNT 0xff -#define SGSEQBCNT 0x9c - #define SLVSPLTOUTATTR1 0x9d #define CMPLT_DNUM 0xf8 #define CMPLT_FNUM 0x07 +#define SLVSPLTOUTATTR2 0x9e +#define CMPLT_BNUM 0xff + #define SGSPLTSTAT0 0x9e #define STAETERM 0x80 #define SCBCERR 0x40 @@ -2439,9 +2141,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define RXSCEMSG 0x02 #define RXSPLTRSP 0x01 -#define SLVSPLTOUTATTR2 0x9e -#define CMPLT_BNUM 0xff - #define SGSPLTSTAT1 0x9f #define RXDATABUCKET 0x01 @@ -2497,10 +2196,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define CCSGADDR 0xac -#define CCSCBADDR 0xac - #define CCSCBADR_BK 0xac +#define CCSCBADDR 0xac + #define CMC_RAMBIST 0xad #define SG_ELEMENT_SIZE 0x80 #define SCBRAMBIST_FAIL 0x40 @@ -2554,9 +2253,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define SEEDAT 0xbc #define SEECTL 0xbe -#define SEEOP_EWDS 0x40 #define SEEOP_WALL 0x40 #define SEEOP_EWEN 0x40 +#define SEEOP_EWDS 0x40 #define SEEOPCODE 0x70 #define SEERST 0x02 #define SEESTART 0x01 @@ -2573,25 +2272,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define SCBCNT 0xbf +#define DFWADDR 0xc0 + #define DSPFLTRCTL 0xc0 #define FLTRDISABLE 0x20 #define EDGESENSE 0x10 #define DSPFCNTSEL 0x0f -#define DFWADDR 0xc0 - #define DSPDATACTL 0xc1 #define BYPASSENAB 0x80 #define DESQDIS 0x10 #define RCVROFFSTDIS 0x04 #define XMITOFFSTDIS 0x02 +#define DFRADDR 0xc2 + #define DSPREQCTL 0xc2 #define MANREQCTL 0xc0 #define MANREQDLY 0x3f -#define DFRADDR 0xc2 - #define DSPACKCTL 0xc3 #define MANACKCTL 0xc0 #define MANACKDLY 0x3f @@ -2612,14 +2311,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define WRTBIASCALC 0xc7 -#define DFPTRS 0xc8 - #define RCVRBIASCALC 0xc8 -#define DFBKPTR 0xc9 +#define DFPTRS 0xc8 #define SKEWCALC 0xc9 +#define DFBKPTR 0xc9 + #define DFDBCTL 0xcb #define DFF_CIO_WR_RDY 0x20 #define DFF_CIO_RD_RDY 0x10 @@ -2704,12 +2403,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define ACCUM_SAVE 0xfa +#define WAITING_SCB_TAILS 0x100 + #define AHD_PCI_CONFIG_BASE 0x100 #define SRAM_BASE 0x100 -#define WAITING_SCB_TAILS 0x100 - #define WAITING_TID_HEAD 0x120 #define WAITING_TID_TAIL 0x122 @@ -2738,8 +2437,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define PRELOADEN 0x80 #define WIDEODD 0x40 #define SCSIEN 0x20 -#define SDMAENACK 0x10 #define SDMAEN 0x10 +#define SDMAENACK 0x10 #define HDMAEN 0x08 #define HDMAENACK 0x08 #define DIRECTION 0x04 @@ -2837,12 +2536,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define MK_MESSAGE_SCSIID 0x162 +#define SCB_BASE 0x180 + #define SCB_RESIDUAL_DATACNT 0x180 #define SCB_CDB_STORE 0x180 #define SCB_HOST_CDB_PTR 0x180 -#define SCB_BASE 0x180 - #define SCB_RESIDUAL_SGPTR 0x184 #define SG_ADDR_MASK 0xf8 #define SG_OVERRUN_RESID 0x02 @@ -2910,17 +2609,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define SCB_DISCONNECTED_LISTS 0x1b8 -#define CMD_GROUP_CODE_SHIFT 0x05 -#define STIMESEL_MIN 0x18 -#define STIMESEL_SHIFT 0x03 -#define INVALID_ADDR 0x80 -#define AHD_PRECOMP_MASK 0x07 -#define TARGET_DATA_IN 0x01 -#define CCSCBADDR_MAX 0x80 -#define NUMDSPS 0x14 -#define SEEOP_EWEN_ADDR 0xc0 -#define AHD_ANNEXCOL_PER_DEV0 0x04 -#define DST_MODE_SHIFT 0x04 #define AHD_TIMER_MAX_US 0x18ffe7 #define AHD_TIMER_MAX_TICKS 0xffff #define AHD_SENSE_BUFSIZE 0x100 @@ -2955,32 +2643,43 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; #define LUNLEN_SINGLE_LEVEL_LUN 0x0f #define NVRAM_SCB_OFFSET 0x2c #define STATUS_PKT_SENSE 0xff +#define CMD_GROUP_CODE_SHIFT 0x05 #define MAX_OFFSET_PACED_BUG 0x7f #define STIMESEL_BUG_ADJ 0x08 +#define STIMESEL_MIN 0x18 +#define STIMESEL_SHIFT 0x03 #define CCSGRAM_MAXSEGS 0x10 +#define INVALID_ADDR 0x80 #define SEEOP_ERAL_ADDR 0x80 #define AHD_SLEWRATE_DEF_REVB 0x08 #define AHD_PRECOMP_CUTBACK_17 0x04 +#define AHD_PRECOMP_MASK 0x07 #define SRC_MODE_SHIFT 0x00 #define PKT_OVERRUN_BUFSIZE 0x200 #define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30 +#define TARGET_DATA_IN 0x01 #define HOST_MSG 0xff #define MAX_OFFSET 0xfe #define BUS_16_BIT 0x01 +#define CCSCBADDR_MAX 0x80 +#define NUMDSPS 0x14 +#define SEEOP_EWEN_ADDR 0xc0 +#define AHD_ANNEXCOL_PER_DEV0 0x04 +#define DST_MODE_SHIFT 0x04 /* Downloaded Constant Definitions */ -#define SG_SIZEOF 0x04 -#define SG_PREFETCH_ALIGN_MASK 0x02 -#define SG_PREFETCH_CNT_LIMIT 0x01 #define CACHELINE_MASK 0x07 #define SCB_TRANSFER_SIZE 0x06 #define PKT_OVERRUN_BUFOFFSET 0x05 +#define SG_SIZEOF 0x04 #define SG_PREFETCH_ADDR_MASK 0x03 +#define SG_PREFETCH_ALIGN_MASK 0x02 +#define SG_PREFETCH_CNT_LIMIT 0x01 #define SG_PREFETCH_CNT 0x00 #define DOWNLOAD_CONST_COUNT 0x08 /* Exported Labels */ -#define LABEL_timer_isr 0x28b #define LABEL_seq_isr 0x28f +#define LABEL_timer_isr 0x28b |