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authorSteve Hodgson <shodgson@solarflare.com>2011-03-22 22:46:43 +0300
committerBen Hutchings <bhutchings@solarflare.com>2011-03-23 04:35:15 +0300
commitd88d6b05fee3cc78e5b0273eb58c31201dcc6b76 (patch)
treeba6286ba53298271070c217492f39bdb259681e4 /drivers/regulator
parent736561a01f11114146b1b7f82d486fa9c95828ef (diff)
downloadlinux-d88d6b05fee3cc78e5b0273eb58c31201dcc6b76.tar.xz
sfc: Siena: Disable write-combining when SR-IOV is enabled
If SR-IOV is enabled by firmware, even if it is not enabled in the PCI capability, TX pushes using write-combining may be corrupted. We want to know whether it is enabled before mapping the NIC registers, and even if PCI extended capabilities are not accessible. Therefore, we look for the MSI capability, which is removed if SR-IOV is enabled. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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