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authorWu Hao <hao.wu@intel.com>2019-06-28 03:49:39 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-07-03 20:58:59 +0300
commit69416739ee3692f4ba890f153d9000e865b73c2d (patch)
tree5741f58fc425337f8e407aae8a006afc56c0e0c1 /drivers/platform
parent49ec630cd5e497c97c6a8a0fc4df5b2c88ca11c6 (diff)
downloadlinux-69416739ee3692f4ba890f153d9000e865b73c2d.tar.xz
fpga: dfl: fme: align PR buffer size per PR datawidth
Current driver checks if input bitstream file size is aligned or not per PR data width (default 32bits). It requires one additional step for end user when they generate the bitstream file, padding extra zeros to bitstream file to align its size per PR data width, but they don't have to as hardware will drop extra padding bytes automatically. In order to simplify the user steps, this patch aligns PR buffer size per PR data width in driver, to allow user to pass unaligned size bitstream files to driver. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Acked-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Moritz Fischer <mdf@kernel.org> Link: https://lore.kernel.org/r/20190628004951.6202-4-mdf@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/platform')
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