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| author | Kate Hsuan <hpa@redhat.com> | 2021-08-20 14:04:44 +0300 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2021-08-20 21:00:21 +0300 |
| commit | fa082a7cf5a66a42a06da048afd972e2cc1b67ea (patch) | |
| tree | c62f32a24fee084bf3fe88d04b395551941090bd /drivers/platform/x86/Kconfig | |
| parent | 386d17b22e422da3285e33fe8dcc282f02d98178 (diff) | |
| download | linux-fa082a7cf5a66a42a06da048afd972e2cc1b67ea.tar.xz | |
platform/x86: intel_pmc_core: Move to intel sub-directory
Move Intel PMC core driver to intel sub-directory to improve readability.
Signed-off-by: Kate Hsuan <hpa@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
Link: https://lore.kernel.org/r/20210820110458.73018-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform/x86/Kconfig')
| -rw-r--r-- | drivers/platform/x86/Kconfig | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 9cadce7908ea..aed7570388ef 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -1159,27 +1159,6 @@ config INTEL_UNCORE_FREQ_CONTROL To compile this driver as a module, choose M here: the module will be called intel-uncore-frequency. -config INTEL_PMC_CORE - tristate "Intel PMC Core driver" - depends on PCI - depends on ACPI - help - The Intel Platform Controller Hub for Intel Core SoCs provides access - to Power Management Controller registers via various interfaces. This - driver can utilize debugging capabilities and supported features as - exposed by the Power Management Controller. It also may perform some - tasks in the PMC in order to enable transition into the SLPS0 state. - It should be selected on all Intel platforms supported by the driver. - - Supported features: - - SLP_S0_RESIDENCY counter - - PCH IP Power Gating status - - LTR Ignore / LTR Show - - MPHY/PLL gating status (Sunrisepoint PCH only) - - SLPS0 Debug registers (Cannonlake/Icelake PCH) - - Low Power Mode registers (Tigerlake and beyond) - - PMC quirks as needed to enable SLPS0/S0ix - config INTEL_SCU_IPC bool |