diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-10-28 18:16:37 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-11-13 17:37:41 +0300 |
| commit | 7b1425f08f5620bde28aced29820004bc8c28962 (patch) | |
| tree | b78513853e819176fac56e1838d453428ae4d80d /drivers/pinctrl | |
| parent | a3ee0a246df1755af04d79cd6cd53939aeb6a0db (diff) | |
| download | linux-7b1425f08f5620bde28aced29820004bc8c28962.tar.xz | |
pinctrl: renesas: Protect GPIO leftovers by CONFIG_PINCTRL_SH_FUNC_GPIO
On SuperH and ARM SH/R-Mobile SoCs, the pin control driver handles
GPIOs, too. To reduce code size when compiling a kernel supporting only
modern SoCs, most, but not all, of the GPIO functionality is protected
by checks for CONFIG_PINCTRL_SH_FUNC_GPIO.
Factor out the remaining parts when not needed:
1. sh_pfc_soc_info.{in,out}put describe GPIO pins that have input
resp. output capabilities (SuperH and SH/R-Mobile).
2. sh_pfc_soc_info.gpio_irq{,_size} describe the mapping from GPIO
pins to interrupt numbers (SH/R-Mobile).
3. sh_pfc_gpio_set_direction() configures GPIO direction, called from
the GPIO driver through pinctrl_gpio_direction_{in,out}put()
(SH/R-Mobile). Unfortunately this function cannot just be moved to
drivers/pinctrl/renesas/gpio.c, as it relies on knowledge of
sh_pfc_pinctrl, which is internal to
drivers/pinctrl/renesas/pinctrl.c.
While code size reduction is minimal, this does help in documenting
depencies.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201028151637.1734130-9-geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/renesas/core.c | 2 | ||||
| -rw-r--r-- | drivers/pinctrl/renesas/pinctrl.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/renesas/sh_pfc.h | 8 |
3 files changed, 11 insertions, 3 deletions
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index c528c124fb0e..2cc457279345 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -315,6 +315,7 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) range = NULL; break; +#ifdef CONFIG_PINCTRL_SH_PFC_GPIO case PINMUX_TYPE_OUTPUT: range = &pfc->info->output; break; @@ -322,6 +323,7 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) case PINMUX_TYPE_INPUT: range = &pfc->info->input; break; +#endif /* CONFIG_PINCTRL_SH_PFC_GPIO */ default: return -EINVAL; diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c index d5c798e98c18..ac542d278a38 100644 --- a/drivers/pinctrl/renesas/pinctrl.c +++ b/drivers/pinctrl/renesas/pinctrl.c @@ -435,6 +435,7 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev, spin_unlock_irqrestore(&pfc->lock, flags); } +#ifdef CONFIG_PINCTRL_SH_PFC_GPIO static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset, bool input) @@ -462,6 +463,9 @@ static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev, spin_unlock_irqrestore(&pfc->lock, flags); return ret; } +#else +#define sh_pfc_gpio_set_direction NULL +#endif static const struct pinmux_ops sh_pfc_pinmux_ops = { .get_functions_count = sh_pfc_get_functions_count, diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 3b390dffacb4..dc484c13f59c 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -270,8 +270,13 @@ struct sh_pfc_soc_info { const char *name; const struct sh_pfc_soc_operations *ops; +#ifdef CONFIG_PINCTRL_SH_PFC_GPIO struct pinmux_range input; struct pinmux_range output; + const struct pinmux_irq *gpio_irq; + unsigned int gpio_irq_size; +#endif + struct pinmux_range function; const struct sh_pfc_pin *pins; @@ -295,9 +300,6 @@ struct sh_pfc_soc_info { const u16 *pinmux_data; unsigned int pinmux_data_size; - const struct pinmux_irq *gpio_irq; - unsigned int gpio_irq_size; - u32 unlock_reg; }; |