summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/sh-pfc
diff options
context:
space:
mode:
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>2016-11-11 23:33:40 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2016-11-16 12:29:13 +0300
commitb25719eb938eb39aeaaa9535f7b70405d6ff2700 (patch)
tree08280e17151baa40e77ad314c7db836724a151a0 /drivers/pinctrl/sh-pfc
parentea9c740583c6857b07ffc310eca967bc39ff6a21 (diff)
downloadlinux-b25719eb938eb39aeaaa9535f7b70405d6ff2700.tar.xz
pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins
Group the AVB pins into similar groups found in other sh-pfc drivers. The pins can not be muxed between functions other then AVB but their drive strength can be controlled. The group avb_mdc containing ADV_MDC and ADV_MDIO are on other SoCs called avb_mdio. In pfc-r8a7795 the avb_mdc group already existed and is in use in DT. Therefore add the ADV_MDIO pin to the existing group instead of renaming it. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7795.c30
1 files changed, 27 insertions, 3 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index a69c5dce89a4..d9923c6096d2 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -1648,11 +1648,33 @@ static const unsigned int avb_phy_int_mux[] = {
AVB_PHY_INT_MARK,
};
static const unsigned int avb_mdc_pins[] = {
- /* AVB_MDC */
- RCAR_GP_PIN(2, 9),
+ /* AVB_MDC, AVB_MDIO */
+ RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
};
static const unsigned int avb_mdc_mux[] = {
- AVB_MDC_MARK,
+ AVB_MDC_MARK, AVB_MDIO_MARK,
+};
+static const unsigned int avb_mii_pins[] = {
+ /*
+ * AVB_TX_CTL, AVB_TXC, AVB_TD0,
+ * AVB_TD1, AVB_TD2, AVB_TD3,
+ * AVB_RX_CTL, AVB_RXC, AVB_RD0,
+ * AVB_RD1, AVB_RD2, AVB_RD3,
+ * AVB_TXCREFCLK
+ */
+ PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
+ PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
+ PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
+ PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
+ PIN_NUMBER('A', 12),
+
+};
+static const unsigned int avb_mii_mux[] = {
+ AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
+ AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
+ AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
+ AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
+ AVB_TXCREFCLK_MARK,
};
static const unsigned int avb_avtp_pps_pins[] = {
/* AVB_AVTP_PPS */
@@ -3720,6 +3742,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(avb_magic),
SH_PFC_PIN_GROUP(avb_phy_int),
SH_PFC_PIN_GROUP(avb_mdc),
+ SH_PFC_PIN_GROUP(avb_mii),
SH_PFC_PIN_GROUP(avb_avtp_pps),
SH_PFC_PIN_GROUP(avb_avtp_match_a),
SH_PFC_PIN_GROUP(avb_avtp_capture_a),
@@ -4024,6 +4047,7 @@ static const char * const avb_groups[] = {
"avb_magic",
"avb_phy_int",
"avb_mdc",
+ "avb_mii",
"avb_avtp_pps",
"avb_avtp_match_a",
"avb_avtp_capture_a",