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| author | Paul Cercueil <paul@crapouillou.net> | 2019-12-10 19:44:46 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-12-16 13:38:20 +0300 |
| commit | 9e65527ac3bab5480529d1ad07d4d228cc0295cd (patch) | |
| tree | 6e4bfa5b1142957d2c29e9a8d168a3cdc922718d /drivers/pinctrl/pinctrl-ingenic.c | |
| parent | d5a362149c4db2939a3d97e63fd2108489c60b41 (diff) | |
| download | linux-9e65527ac3bab5480529d1ad07d4d228cc0295cd.tar.xz | |
pinctrl: ingenic: Fixup PIN_CONFIG_OUTPUT config
JZ4760 support was added in parallel of the previous patch so this one
slipped through. The first SoC to use the new register is the JZ4760 and
not the JZ4770, fix it here.
Fixes: 7009d046a601 ("pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config")
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20191210164446.53912-1-paul@crapouillou.net
[Folded into OF dependency]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-ingenic.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-ingenic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 24e0e2ef47a4..369e04350e3d 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -1809,7 +1809,7 @@ static void ingenic_set_bias(struct ingenic_pinctrl *jzpc, static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc, unsigned int pin, bool high) { - if (jzpc->version >= ID_JZ4770) + if (jzpc->version >= ID_JZ4760) ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, high); else ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DATA, high); |