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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-20 21:23:30 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-20 21:23:30 +0400
commit8a3a11f91def34424b1995cb54ccd658efde8568 (patch)
tree6b97487ffea8cb7d8c280bb88fd681335f91cf73 /drivers/pinctrl/pinctrl-falcon.c
parent8909ff652ddfc83ecdf450f96629c25489d88f77 (diff)
parentade158eb53eed40f6090e9f7ee6ee3513ec1eec4 (diff)
downloadlinux-8a3a11f91def34424b1995cb54ccd658efde8568.tar.xz
Merge tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl changes from Linus Walleij: "These are the main pinctrl changes for the v3.9 merge window. The most interesting change by far is how the device core grabs pinctrl default handles avoiding the need to stick boilerplate into driver consumers. - Grabbing of default pinctrl handles from the device core. These are the hunks hitting drivers/base. All is ACKed by Greg, after a long discussion about different alternatives. - Some stuff also touches the MFD and ARM SoC trees, this has been coordinated and ACKed. - New drivers for: - The Tegra 114 sub-SoC - Allwinner sunxi - New ABx500 driver and sub-SoC drivers for AB8500, AB8505, AB9540 and AB8540. - Make it possible for hogged pins to enter a sleep mode, and make it possible for drivers to control that mode. - Various clean-up, extensions and device tree support to various pin controllers." * tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (68 commits) pinctrl: tegra: add clfvs function to Tegra114 support pinctrl: generic: rename input schmitt disable pinctrl/pinconfig: add debug interface pinctrl: samsung: remove duplicated line ARM: ux500: use real AB8500 IRQ numbers instead of virtual ones ARM: ux500: remove irq_base property from platform_data pinctrl/abx500: use direct IRQ defines pinctrl/abx500: replace IRQ offsets with table read-in values pinctrl/abx500: move IRQ handling to ab8500-core pinctrl: exynos5440: remove erroneous __init pinctrl/abx500: adjust offset for get_mode() pinctrl/abx500: add Device Tree support pinctrl/abx500: align GPIO cluster boundaries pinctrl/abx500: prevent error path from corrupting returning error pinctrl: sunxi: add of_xlate function pinctrl/lantiq: fix pin number in ltq_pmx_gpio_request_enable pinctrl/lantiq: add functionality to falcon_pinconf_dbg_show pinctrl/lantiq: fix pinconfig parameters pinctrl/lantiq: one of the boot leds was defined incorrectly pinctrl/lantiq: only probe available pad controllers ...
Diffstat (limited to 'drivers/pinctrl/pinctrl-falcon.c')
-rw-r--r--drivers/pinctrl/pinctrl-falcon.c38
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 8ed20e84cb02..4a0d54a08890 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -170,7 +170,7 @@ static const unsigned pins_ntr[] = {GPIO4};
static const unsigned pins_ntr8k[] = {GPIO5};
static const unsigned pins_hrst[] = {GPIO6};
static const unsigned pins_mdio[] = {GPIO7, GPIO8};
-static const unsigned pins_bled[] = {GPIO7, GPIO10, GPIO11,
+static const unsigned pins_bled[] = {GPIO9, GPIO10, GPIO11,
GPIO12, GPIO13, GPIO14};
static const unsigned pins_asc0[] = {GPIO32, GPIO33};
static const unsigned pins_spi[] = {GPIO34, GPIO35, GPIO36};
@@ -315,6 +315,37 @@ static int falcon_pinconf_set(struct pinctrl_dev *pctrldev,
static void falcon_pinconf_dbg_show(struct pinctrl_dev *pctrldev,
struct seq_file *s, unsigned offset)
{
+ unsigned long config;
+ struct pin_desc *desc;
+
+ struct ltq_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
+ int port = PORT(offset);
+
+ seq_printf(s, " (port %d) mux %d -- ", port,
+ pad_r32(info->membase[port], LTQ_PADC_MUX(PORT_PIN(offset))));
+
+ config = LTQ_PINCONF_PACK(LTQ_PINCONF_PARAM_PULL, 0);
+ if (!falcon_pinconf_get(pctrldev, offset, &config))
+ seq_printf(s, "pull %d ",
+ (int)LTQ_PINCONF_UNPACK_ARG(config));
+
+ config = LTQ_PINCONF_PACK(LTQ_PINCONF_PARAM_DRIVE_CURRENT, 0);
+ if (!falcon_pinconf_get(pctrldev, offset, &config))
+ seq_printf(s, "drive-current %d ",
+ (int)LTQ_PINCONF_UNPACK_ARG(config));
+
+ config = LTQ_PINCONF_PACK(LTQ_PINCONF_PARAM_SLEW_RATE, 0);
+ if (!falcon_pinconf_get(pctrldev, offset, &config))
+ seq_printf(s, "slew-rate %d ",
+ (int)LTQ_PINCONF_UNPACK_ARG(config));
+
+ desc = pin_desc_get(pctrldev, offset);
+ if (desc) {
+ if (desc->gpio_owner)
+ seq_printf(s, " owner: %s", desc->gpio_owner);
+ } else {
+ seq_printf(s, " not registered");
+ }
}
static void falcon_pinconf_group_dbg_show(struct pinctrl_dev *pctrldev,
@@ -360,6 +391,8 @@ static const struct ltq_cfg_param falcon_cfg_params[] = {
static struct ltq_pinmux_info falcon_info = {
.desc = &falcon_pctrl_desc,
.apply_mux = falcon_mux_apply,
+ .params = falcon_cfg_params,
+ .num_params = ARRAY_SIZE(falcon_cfg_params),
};
@@ -398,6 +431,9 @@ static int pinctrl_falcon_probe(struct platform_device *pdev)
u32 avail;
int pins;
+ if (!of_device_is_available(np))
+ continue;
+
if (!ppdev) {
dev_err(&pdev->dev, "failed to find pad pdev\n");
continue;