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authorXingyu Chen <xingyu.chen@amlogic.com>2017-11-20 13:08:24 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-11-30 16:28:16 +0300
commit0fabe43f3f60e151e4a266049de66aa1fb4e2146 (patch)
treecb2a629f6820792294af64e842524e33a0877575 /drivers/pinctrl/meson/pinctrl-meson.h
parent6200248f41582a410fd0f81dcbe9732ebf6b3560 (diff)
downloadlinux-0fabe43f3f60e151e4a266049de66aa1fb4e2146.tar.xz
pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series, which use continuous 4-bit register to select function for each pin. In order to support this, a new pinmux operations "meson_axg_pmx_ops" has been added. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/meson/pinctrl-meson.h')
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index 183b6e471635..12a391109329 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -108,6 +108,7 @@ struct meson_pinctrl_data {
struct meson_bank *banks;
unsigned int num_banks;
const struct pinmux_ops *pmx_ops;
+ void *pmx_data;
};
struct meson_pinctrl {